[HACK] Testing Laguna evalboard with CN9130

board/aarch64/cn9130-laguna/linux_defconfig

@@ -0,0 +1,558 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_JIT=y
+CONFIG_PREEMPT=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
+CONFIG_USER_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PROFILING=y
+CONFIG_ARCH_SPARX5=y
+CONFIG_ARCH_LAN969X=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_NR_CPUS=64
+CONFIG_COMPAT=y
+# CONFIG_SUSPEND is not set
+CONFIG_ARM_PSCI_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
+CONFIG_ARM_ARMADA_8K_CPUFREQ=y
+CONFIG_ACPI=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_GCC_PLUGINS is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_KSM=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_XDP_SOCKETS=y
+CONFIG_XDP_SOCKETS_DIAG=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE_DEMUX=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=m
+CONFIG_NET_FOU_IP_TUNNELS=y
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_GRE=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_NETWORK_PHY_TIMESTAMPING=y
+CONFIG_NETFILTER=y
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_QUEUE=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_TABLES=y
+CONFIG_NF_TABLES_INET=y
+CONFIG_NF_TABLES_NETDEV=y
+CONFIG_NFT_CT=m
+CONFIG_NFT_CONNLIMIT=m
+CONFIG_NFT_LOG=m
+CONFIG_NFT_LIMIT=m
+CONFIG_NFT_MASQ=m
+CONFIG_NFT_REDIR=m
+CONFIG_NFT_NAT=m
+CONFIG_NFT_TUNNEL=m
+CONFIG_NFT_QUEUE=m
+CONFIG_NFT_REJECT=m
+CONFIG_NFT_COMPAT=m
+CONFIG_NFT_HASH=m
+CONFIG_NFT_XFRM=m
+CONFIG_NFT_SOCKET=m
+CONFIG_NFT_OSF=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
+CONFIG_NFT_REJECT_NETDEV=m
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=m
+CONFIG_NETFILTER_XT_MATCH_CGROUP=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_NAT=m
+CONFIG_IP6_NF_TARGET_MASQUERADE=m
+CONFIG_IP6_NF_TARGET_NPT=m
+CONFIG_NF_TABLES_BRIDGE=m
+CONFIG_NFT_BRIDGE_META=m
+CONFIG_NF_CONNTRACK_BRIDGE=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+CONFIG_BPFILTER=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_BRIDGE_MRP=y
+CONFIG_BRIDGE_CFM=y
+CONFIG_NET_DSA=y
+CONFIG_VLAN_8021Q=y
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_MQPRIO=y
+CONFIG_NET_CLS_BASIC=y
+CONFIG_NET_CLS_BPF=y
+CONFIG_NET_CLS_FLOWER=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_NET_ACT_SKBEDIT=y
+CONFIG_DCB=y
+CONFIG_NETLINK_DIAG=y
+CONFIG_MPLS=y
+CONFIG_NET_MPLS_GSO=y
+CONFIG_MPLS_ROUTING=m
+CONFIG_MPLS_IPTUNNEL=m
+CONFIG_NET_PKTGEN=y
+# CONFIG_WIRELESS is not set
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_LWTUNNEL=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_IOV=y
+CONFIG_PCI_AARDVARK=y
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCIE_ARMADA_8K=y
+CONFIG_UEVENT_HELPER=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_CFG_SYSFS=y
+CONFIG_FW_CFG_SYSFS_CMDLINE=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_BLOCK2MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_NAND_MARVELL=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_OF_OVERLAY=y
+CONFIG_BLK_DEV_NULL_BLK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_BLK_DEV_NVME=y
+CONFIG_SRAM=y
+CONFIG_EEPROM_AT24=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_LIBSAS=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_VIRTIO=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_MVEBU=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_INIT=y
+CONFIG_DM_VERITY=y
+CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y
+CONFIG_NETDEVICES=y
+CONFIG_BONDING=m
+CONFIG_DUMMY=m
+CONFIG_NET_TEAM=m
+CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m
+CONFIG_NET_TEAM_MODE_LOADBALANCE=m
+CONFIG_MACVLAN=m
+CONFIG_MACVTAP=m
+CONFIG_IPVLAN=m
+CONFIG_IPVTAP=m
+CONFIG_VXLAN=m
+CONFIG_GENEVE=m
+CONFIG_BAREUDP=m
+CONFIG_MACSEC=m
+CONFIG_TUN=m
+CONFIG_VETH=m
+CONFIG_VIRTIO_NET=y
+CONFIG_NLMON=y
+CONFIG_NET_VRF=y
+CONFIG_NET_DSA_MV88E6XXX=m
+CONFIG_NET_DSA_MV88E6XXX_PTP=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+CONFIG_MVNETA=m
+CONFIG_MVPP2=m
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+CONFIG_LAN969X_SWITCH=y
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MYRI is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETERION is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
+# CONFIG_NET_VENDOR_PENSANDO is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RDC is not set
+CONFIG_8139CP=y
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XILINX is not set
+CONFIG_SFP=y
+CONFIG_AX88796B_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_MARVELL_10G_PHY=m
+CONFIG_MICREL_PHY=y
+CONFIG_MICROCHIP_PHY=y
+CONFIG_MICROCHIP_T1_PHY=y
+CONFIG_MICROSEMI_PHY=m
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_MVUSB=m
+CONFIG_MDIO_MSCC_MIIM=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_USB_RTL8152=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_CDC_EEM=m
+# CONFIG_USB_NET_CDC_NCM is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_WLAN is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_MVEBU_UART=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_GPIO=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_MUX_PINCTRL=y
+CONFIG_I2C_AT91=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_SLAVE=y
+CONFIG_SPI=y
+CONFIG_SPI_ARMADA_3700=y
+CONFIG_SPI_ORION=y
+CONFIG_SPI_PL022=y
+CONFIG_SPI_MUX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPMI=y
+CONFIG_PINCTRL_MCP23S08=y
+CONFIG_PINCTRL_MICROCHIP_SGPIO=y
+CONFIG_PINCTRL_OCELOT=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_XGENE=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_GPIO_PCF857X=y
+CONFIG_GPIO_MAX77620=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_CHARGER_GPIO=y
+CONFIG_SENSORS_SPARX5=y
+CONFIG_SENSORS_JC42=y
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_INA2XX=m
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_ARMADA_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_SYSFS=y
+CONFIG_SOFT_WATCHDOG=y
+CONFIG_GPIO_WATCHDOG=y
+CONFIG_ARMADA_37XX_WATCHDOG=y
+CONFIG_I6300ESB_WDT=y
+CONFIG_MFD_ATMEL_FLEXCOM=y
+CONFIG_MFD_MAX77620=y
+CONFIG_MFD_LAN966X_PCI=y
+CONFIG_MFD_LAN969X_PCI=y
+CONFIG_MFD_SEC_CORE=y
+CONFIG_MFD_ROHM_BD718XX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_BD718XX=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_MAX77620=y
+CONFIG_REGULATOR_PCA9450=y
+CONFIG_REGULATOR_QCOM_SPMI=y
+CONFIG_REGULATOR_S2MPS11=y
+# CONFIG_HID_GENERIC is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+CONFIG_USB_ULPI_BUS=y
+CONFIG_USB=m
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=m
+CONFIG_USB_XHCI_MVEBU=m
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_HCD_PLATFORM=m
+CONFIG_USB_OHCI_HCD=m
+CONFIG_USB_OHCI_HCD_PLATFORM=m
+CONFIG_USB_STORAGE=m
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_CHIPIDEA=m
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_HSIC_USB3503=m
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_SNP_UDC_PLAT=y
+CONFIG_TYPEC=y
+CONFIG_TYPEC_TCPM=m
+CONFIG_TYPEC_TCPCI=m
+CONFIG_TYPEC_RT1711H=m
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_SPARX5=y
+CONFIG_MMC_SPI=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
+CONFIG_MMC_DW_K3=y
+CONFIG_MMC_SDHCI_XENON=y
+CONFIG_SCSI_UFSHCD=y
+CONFIG_SCSI_UFSHCD_PLATFORM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_SYSCON=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_NETDEV=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_PCF8523=y
+CONFIG_RTC_DRV_S5M=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RTC_DRV_ARMADA38X=y
+CONFIG_DMADEVICES=y
+CONFIG_MV_XOR=y
+CONFIG_MV_XOR_V2=y
+CONFIG_PL330_DMA=y
+CONFIG_UIO=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_INPUT=y
+CONFIG_VIRTIO_MMIO=y
+# CONFIG_SURFACE_PLATFORMS is not set
+CONFIG_COMMON_CLK_CS2000_CP=y
+CONFIG_COMMON_CLK_S2MPS11=y
+CONFIG_COMMON_CLK_XGENE=y
+CONFIG_COMMON_CLK_BD718XX=y
+CONFIG_MAILBOX=y
+CONFIG_ARM_SMMU=y
+CONFIG_ARM_SMMU_V3=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_IIO=y
+CONFIG_TI_ADC081C=y
+CONFIG_PWM=y
+CONFIG_PHY_MVEBU_CP110_COMPHY=y
+CONFIG_PHY_MVEBU_CP110_UTMI=y
+CONFIG_PHY_SAMSUNG_USB2=y
+CONFIG_NVMEM_LAYOUT_ONIE_TLV=y
+CONFIG_MUX_MMIO=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+CONFIG_FUSE_FS=y
+CONFIG_VIRTIO_FS=y
+CONFIG_OVERLAY_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_SQUASHFS_ZSTD=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY=y
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=0
+CONFIG_IRQ_POLL=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PANIC_TIMEOUT=20
+CONFIG_HARDLOCKUP_DETECTOR=y
+CONFIG_WQ_WATCHDOG=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_PROVE_LOCKING=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_RCU_CPU_STALL_CPUTIME=y
+CONFIG_FUNCTION_TRACER=y
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_MEMTEST=y

board/aarch64/dts/marvell/cn9130-crb-A.dts

@@ -34,6 +34,8 @@
 	iommu-map-mask = <0x031f>;
 };
 
+#include "lan969x-pcie.dtsi"
+
 &cp0_usb3_0 {
 	status = "okay";
 	usb-phy = <&cp0_usb3_0_phy0>;

board/aarch64/dts/marvell/lan969x-pcie.dtsi

@@ -0,0 +1,428 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/clock/microchip,lan966x.h>
+
+&cp0_pcie0 {
+	pci@0,0 {
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+
+		reg = <0 0 0 0 0>;
+		ranges = <0x02000000 0x0 0xc0000000 0x02000000 0x0 0xc0000000 0x0 0x40000000>;
+
+		lan969x: ep_lan969x@0,0 {
+			compatible = "pci1055,9690";
+
+			reg = <0 0 0 0 0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ranges = <0xe2000000 0x02000000 0x0 0xc0000000 0x02000000>,
+			         <0xe0000000 0x02000000 0x0 0xc2000000 0x01000000>;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			interrupt-parent = <&lan969x>;
+
+			clocks {
+				fx100_clk: fx100-clk {
+					compatible = "fixed-clock";
+					#clock-cells = <0>;
+					clock-frequency = <320000000>;
+				};
+
+				fabric_clk: fabric-clk {
+					compatible = "fixed-clock";
+					#clock-cells = <0>;
+					clock-frequency = <250000000>;
+				};
+			};
+
+			cpu_ctrl: syscon@e00c0000 {
+				compatible = "microchip,lan966x-cpu-syscon", "syscon";
+				reg = <0xe00c0000 0x350>;
+			};
+
+			lan969x_gpio: pinctrl@e20100d4 {
+				compatible = "microchip,lan969x-pinctrl";
+				reg = <0xe20100d4 0xd4>,
+				      <0xe2010370 0xa8>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				gpio-ranges = <&lan969x_gpio 0 0 66>;
+				interrupt-controller;
+				interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+				#interrupt-cells = <2>;
+				#address-cells = <1>;
+			};
+
+			mdio0: mdio@e20101a8 {
+				compatible = "mscc,ocelot-miim";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0xe20101a8 0x24>;
+				clocks = <&fx100_clk>;
+				status = "disabled";
+			};
+
+			sgpio: gpio@e2010230 {
+				compatible = "microchip,sparx5-sgpio";
+				reg = <0xe2010230 0x118>;
+				clocks = <&fx100_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+
+				sgpio_in: gpio@0 {
+					compatible = "microchip,sparx5-sgpio-bank";
+					reg = <0>;
+					gpio-controller;
+					#gpio-cells = <3>;
+					interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
+					interrupt-controller;
+					#interrupt-cells = <3>;
+					#adress-cells = <0>;
+				};
+
+				sgpio_out: gpio@1 {
+					compatible = "microchip,sparx5-sgpio-bank";
+					reg = <1>;
+					gpio-controller;
+					#gpio-cells = <3>;
+				};
+			};
+
+			lan969x_flx3: flexcom@e0064000 {
+				compatible = "atmel,sama5d2-flexcom";
+				reg = <0xe0064000 0x100>;
+				clocks = <&fabric_clk>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x0 0xe0064000 0x800>;
+
+				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+				status = "okay";
+
+				lan969x_i2c3: i2c@600 {
+					compatible = "microchip,sam9x60-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&fabric_clk>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					pinctrl-0 = <&fc3_pins>;
+					pinctrl-names = "default";
+					i2c-analog-filter;
+					i2c-digital-filter;
+					i2c-digital-filter-width-ns = <35>;
+					i2c-sda-hold-time-ns = <1500>;
+					status = "okay";
+				};
+			};
+
+			i2c-mux {
+				compatible = "i2c-mux-gpio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				i2c-parent = <&lan969x_i2c3>;
+
+				mux-gpios = <&sgpio_out 0 1 GPIO_ACTIVE_HIGH
+					     &sgpio_out 0 2 GPIO_ACTIVE_HIGH
+					     &sgpio_out 0 3 GPIO_ACTIVE_HIGH>;
+				idle-state = <0x8>;
+
+				i2c_sfp0: i2c-sfp0 {
+					reg = <0x0>;
+				};
+
+				i2c_sfp1: i2c-sfp1 {
+					reg = <0x1>;
+				};
+
+				i2c_sfp2: i2c-sfp2 {
+					reg = <0x2>;
+				};
+
+				i2c_sfp3: i2c-sfp3 {
+					reg = <0x3>;
+				};
+			};
+
+			sfp0: sfp0 {
+				compatible = "sff,sfp";
+				i2c-bus = <&i2c_sfp0>;
+				tx-disable-gpios = <&sgpio_out 6 2 GPIO_ACTIVE_HIGH>;
+				los-gpios = <&sgpio_in 6 0 GPIO_ACTIVE_HIGH>;
+				mod-def0-gpios = <&sgpio_in 6 1 GPIO_ACTIVE_LOW>;
+				tx-fault-gpios = <&sgpio_in 6 2 GPIO_ACTIVE_HIGH>;
+			};
+
+			sfp1: sfp1 {
+				compatible = "sff,sfp";
+				i2c-bus = <&i2c_sfp1>;
+				tx-disable-gpios = <&sgpio_out 7 2 GPIO_ACTIVE_HIGH>;
+				los-gpios = <&sgpio_in 7 0 GPIO_ACTIVE_HIGH>;
+				mod-def0-gpios = <&sgpio_in 7 1 GPIO_ACTIVE_LOW>;
+				tx-fault-gpios = <&sgpio_in 7 2 GPIO_ACTIVE_HIGH>;
+			};
+
+			sfp2: sfp2 {
+				compatible = "sff,sfp";
+				i2c-bus = <&i2c_sfp2>;
+				tx-disable-gpios = <&sgpio_out 8 2 GPIO_ACTIVE_HIGH>;
+				los-gpios = <&sgpio_in 8 0 GPIO_ACTIVE_HIGH>;
+				mod-def0-gpios = <&sgpio_in 8 1 GPIO_ACTIVE_LOW>;
+				tx-fault-gpios = <&sgpio_in 8 2 GPIO_ACTIVE_HIGH>;
+			};
+
+			sfp3: sfp3 {
+				compatible = "sff,sfp";
+				i2c-bus = <&i2c_sfp3>;
+				tx-disable-gpios = <&sgpio_out 9 2 GPIO_ACTIVE_HIGH>;
+				los-gpios = <&sgpio_in 9 0 GPIO_ACTIVE_HIGH>;
+				mod-def0-gpios = <&sgpio_in 9 1 GPIO_ACTIVE_LOW>;
+				tx-fault-gpios = <&sgpio_in 9 2 GPIO_ACTIVE_HIGH>;
+			};
+
+			lan969x_switch: switch@e0000000 {
+				compatible = "microchip,lan969x-switch";
+				reg = <0xe00c0000 0x800000>,
+				      <0xe2010000 0x1410000>;
+				reg-names = "cpu", "dev";
+				interrupt-names = "xtr", "fdma", "ptp", "ptp-ext";
+				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
+					     <88 IRQ_TYPE_LEVEL_HIGH>,
+					     <9 IRQ_TYPE_LEVEL_HIGH>,
+					     <8 IRQ_TYPE_LEVEL_HIGH>;
+			};
+
+			serdes: serdes@e3410000 {
+				compatible = "microchip,lan969x-serdes";
+				#phy-cells = <1>;
+				clocks = <&fabric_clk>;
+				reg = <0xe3410000 0x150000>;
+			};
+
+			leds {
+				compatible = "gpio-leds";
+
+				led-s6-green {
+					label = "s6:green";
+					gpios = <&sgpio_out 6 0 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s6-yellow {
+					label = "s6:yellow";
+					gpios = <&sgpio_out 6 1 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s7-green {
+					label = "s7:green";
+					gpios = <&sgpio_out 7 0 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s7-yellow {
+					label = "s7:yellow";
+					gpios = <&sgpio_out 7 1 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s8-green {
+					label = "s8:green";
+					gpios = <&sgpio_out 8 0 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s8-yellow {
+					label = "s8:yellow";
+					gpios = <&sgpio_out 8 1 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s9-green {
+					label = "s9:green";
+					gpios = <&sgpio_out 9 0 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+
+				led-s9-yellow {
+					label = "s9:yellow";
+					gpios = <&sgpio_out 9 1 GPIO_ACTIVE_LOW>;
+					default-state = "off";
+				};
+			};
+		};
+	};
+};
+
+&lan969x_gpio {
+	emmc_sd_pins: emmc-sd-pins {
+		/* eMMC_SD - CMD, CLK, D0, D1, D2, D3, D4, D5, D6, D7, RSTN */
+		pins = "GPIO_14", "GPIO_15", "GPIO_16", "GPIO_17",
+		       "GPIO_18", "GPIO_19", "GPIO_20", "GPIO_21",
+		       "GPIO_22", "GPIO_23", "GPIO_24";
+		function = "emmc_sd";
+	};
+
+	fc0_pins: fc0-pins {
+		pins = "GPIO_3", "GPIO_4";
+		function = "fc";
+	};
+
+	fc2_pins: fc2-pins {
+		pins = "GPIO_64", "GPIO_65", "GPIO_66";
+		function = "fc";
+	};
+
+	fc3_pins: fc3-pins {
+		pins = "GPIO_55", "GPIO_56";
+		function = "fc";
+	};
+
+	mdio_pins: mdio-pins {
+		pins = "GPIO_9", "GPIO_10";
+		function = "miim";
+	};
+
+	mdio_irq_pins: mdio-irq-pins {
+		pins = "GPIO_11";
+		function = "miim_irq";
+	};
+
+	sgpio_pins: sgpio-pins {
+		/* SCK, D0, D1, LD */
+		pins = "GPIO_5", "GPIO_6", "GPIO_7", "GPIO_8";
+		function = "sgpio_a";
+	};
+
+	usb_ulpi_pins: usb-ulpi-pins {
+		pins = "GPIO_30", "GPIO_31", "GPIO_32", "GPIO_33",
+		"GPIO_34", "GPIO_35", "GPIO_36", "GPIO_37",
+		"GPIO_38", "GPIO_39", "GPIO_40", "GPIO_41";
+		function = "usb_ulpi";
+	};
+
+	usb_rst_pins: usb-rst-pins {
+		pins = "GPIO_12";
+		function = "usb2phy_rst";
+	};
+
+	usb_over_pins: usb-over-pins {
+		pins = "GPIO_13";
+		function = "usb_over_detect";
+	};
+
+	usb_power_pins: usb-power-pins {
+		pins = "GPIO_1";
+		function = "usb_power";
+	};
+
+	ptp_out_pins: ptp-out-pins {
+		pins = "GPIO_58";
+		function = "ptpsync_4";
+	};
+
+	ptp_ext_pins: ptp-ext-pins {
+		pins = "GPIO_59";
+		function = "ptpsync_5";
+	};
+};
+
+&mdio0 {
+	pinctrl-0 = <&mdio_pins>, <&mdio_irq_pins>;
+	pinctrl-names = "default";
+	reset-gpios = <&lan969x_gpio 62 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+#define CU_PHY(_reg) \
+	phy@_reg { \
+		reg = <_reg>; \
+		interrupts = <11 IRQ_TYPE_LEVEL_LOW>; \
+		interrupt-parent = <&lan969x_gpio>; \
+	}
+
+	phy3:  CU_PHY( 3);
+
+	phy4:  CU_PHY( 4); phy5:  CU_PHY( 5); phy6:  CU_PHY( 6); phy7:  CU_PHY( 7);
+	phy8:  CU_PHY( 8); phy9:  CU_PHY( 9); phy10: CU_PHY(10); phy11: CU_PHY(11);
+	phy12: CU_PHY(12); phy13: CU_PHY(13); phy14: CU_PHY(14); phy15: CU_PHY(15);
+
+	phy16: CU_PHY(16); phy17: CU_PHY(17); phy18: CU_PHY(18); phy19: CU_PHY(19);
+	phy20: CU_PHY(20); phy21: CU_PHY(21); phy22: CU_PHY(22); phy23: CU_PHY(23);
+	phy24: CU_PHY(24); phy25: CU_PHY(25); phy26: CU_PHY(26); phy27: CU_PHY(27);
+};
+
+&sgpio {
+	pinctrl-0 = <&sgpio_pins>;
+	pinctrl-names = "default";
+
+	microchip,sgpio-port-ranges = <0 1>, <6 9>;
+	status = "okay";
+
+	gpio@0 {
+		ngpios = <128>;
+	};
+	gpio@1 {
+		ngpios = <128>;
+	};
+};
+
+&serdes {
+	status = "okay";
+};
+
+&lan969x_switch {
+	pinctrl-0 = <&ptp_out_pins>, <&ptp_ext_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	ethernet-ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+#define CU_SWP(_reg, _phy) \
+		port@_reg { \
+			reg = <_reg>; \
+			microchip,bandwidth = <1000>; \
+			phy-handle = <_phy>; \
+			phy-mode = "qsgmii"; \
+			phys = <&serdes (_reg / 4)>; \
+		}
+
+		CU_SWP( 0,  &phy4); CU_SWP( 1,  &phy5); CU_SWP( 2,  &phy6); CU_SWP( 3,  &phy7);
+		CU_SWP( 4,  &phy8); CU_SWP( 5,  &phy9); CU_SWP( 6, &phy10); CU_SWP( 7, &phy11);
+		CU_SWP( 8, &phy12); CU_SWP( 9, &phy13); CU_SWP(10, &phy14); CU_SWP(11, &phy15);
+
+		CU_SWP(12, &phy16); CU_SWP(13, &phy17); CU_SWP(14, &phy18); CU_SWP(15, &phy19);
+		CU_SWP(16, &phy20); CU_SWP(17, &phy21); CU_SWP(18, &phy22); CU_SWP(19, &phy23);
+		CU_SWP(20, &phy24); CU_SWP(21, &phy25); CU_SWP(22, &phy26); CU_SWP(23, &phy27);
+
+#define SERDES_SWP(_reg, _lane, _sfp, _gpio) \
+		port@_reg { \
+			reg = <_reg>; \
+			microchip,bandwidth = <10000>; \
+			phys = <&serdes _lane>; \
+			phy-mode = "10gbase-r"; \
+			sfp = <_sfp>; \
+			microchip,sd-sgpio = <_gpio>; \
+			managed = "in-band-status"; \
+		}
+
+		SERDES_SWP(24, 6, &sfp0, 365);
+		SERDES_SWP(25, 7, &sfp1, 369);
+		SERDES_SWP(26, 8, &sfp2, 373);
+		SERDES_SWP(27, 9, &sfp3, 377);
+
+		port@29 {
+			reg = <29>;
+			microchip,bandwidth = <1000>;
+			phy-handle = <&phy3>;
+			phy-mode = "rgmii";
+		};
+	};
+};