Merge pull request #1037 from kernelkit/upgrade-kernel

Upgrade kernel to 6.12.26 (LTS)
2026-08-03 06:13:02 +02:00 · 2025-05-02 13:46:15 +02:00
parent 354650c0a5 a0b06b2593
commit a990e559f7
42 changed files with 81 additions and 1902 deletions
@@ -27,7 +27,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build
 BR2_ROOTFS_POST_IMAGE_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-image.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.25"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.26"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/aarch64/linux_defconfig"
 BR2_LINUX_KERNEL_INSTALL_TARGET=y
@@ -27,7 +27,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build
 BR2_ROOTFS_POST_IMAGE_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-image.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.25"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.26"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/aarch64/linux_defconfig"
 BR2_LINUX_KERNEL_INSTALL_TARGET=y
@@ -29,7 +29,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-image
 BR2_ROOTFS_POST_SCRIPT_ARGS="-c $(BR2_EXTERNAL_INFIX_PATH)/board/aarch64/r2s/genimage.cfg"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.25"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.26"
 BR2_LINUX_KERNEL_PATCH="$(BR2_EXTERNAL_INFIX_PATH)/board/aarch64/r2s/rk3328-nanopi-r2s-dts.patch"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/aarch64/r2s/linux_defconfig"
@@ -26,7 +26,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="board/qemu/x86_64/post-build.sh ${BR2_EXTERNAL_INF
 BR2_ROOTFS_POST_IMAGE_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-image.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.25"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.26"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/x86_64/linux_defconfig"
 BR2_LINUX_KERNEL_INSTALL_TARGET=y
@@ -27,7 +27,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="board/qemu/x86_64/post-build.sh ${BR2_EXTERNAL_INF
 BR2_ROOTFS_POST_IMAGE_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-image.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.25"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.26"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/x86_64/linux_defconfig"
 BR2_LINUX_KERNEL_INSTALL_TARGET=y
@@ -6,6 +6,7 @@ All notable changes to the project are documented in this file.
 [v25.05.0][UNRELEASED]
 -------------------------
 ### Changes
+- Upgrade Linux kernel to 6.12.26 (LTS)
 - Upgrade libyang to 3.12.2
 - Upgrade sysrepo to 3.6.11
 - Upgrade netopeer2 (NETCONF) to 2.4.1
@@ -1,46 +0,0 @@
-From 5059085e17b7967a8ed10f10c0cfbe1413a6955c Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:27:58 +0800
-Subject: [PATCH 28/35] drm: of: Get MEDIA_BUS_FMT_RGB101010_1X7X5_{JEIDA,
- SPWG} LVDS data mappings
-Organization: Wires
-
-Add MEDIA_BUS_FMT_RGB101010_1X7X5_{JEIDA,SPWG} support in
-drm_of_lvds_get_data_mapping() function implementation so that function
-callers may get the two LVDS data mappings.
-
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-6-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- drivers/gpu/drm/drm_of.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
-index 177b600895d3..89863a35c731 100644
--- a/drivers/gpu/drm/drm_of.c
-+++ b/drivers/gpu/drm/drm_of.c
-@@ -410,7 +410,9 @@ EXPORT_SYMBOL_GPL(drm_of_lvds_get_dual_link_pixel_order);
-  * Return:
-  * * MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - data-mapping is "jeida-18"
-  * * MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA - data-mapping is "jeida-24"
-+ * * MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA - data-mapping is "jeida-30"
-  * * MEDIA_BUS_FMT_RGB888_1X7X4_SPWG - data-mapping is "vesa-24"
-+ * * MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is "vesa-30"
-  * * -EINVAL - the "data-mapping" property is unsupported
-  * * -ENODEV - the "data-mapping" property is missing
-  */
-@@ -427,8 +429,12 @@ int drm_of_lvds_get_data_mapping(const struct device_node *port)
- 		return MEDIA_BUS_FMT_RGB666_1X7X3_SPWG;
- 	if (!strcmp(mapping, "jeida-24"))
- 		return MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
-+	if (!strcmp(mapping, "jeida-30"))
-+		return MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA;
- 	if (!strcmp(mapping, "vesa-24"))
- 		return MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;
-+	if (!strcmp(mapping, "vesa-30"))
-+		return MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG;
- 
- 	return -EINVAL;
- }
@@ -1,147 +0,0 @@
-From 0f483d196dab387a4ad31342ab1ad5d4c75d5bf8 Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:27:59 +0800
-Subject: [PATCH 29/35] drm: of: Add
- drm_of_lvds_get_dual_link_pixel_order_sink()
-Organization: Wires
-
-drm_of_lvds_get_dual_link_pixel_order() gets LVDS dual-link source pixel
-order.  Similar to it, add it's counterpart function
-drm_of_lvds_get_dual_link_pixel_order_sink() to get LVDS dual-link sink
-pixel order.
-
-Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-7-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- drivers/gpu/drm/drm_of.c | 76 ++++++++++++++++++++++++++++++++++------
- include/drm/drm_of.h     |  9 +++++
- 2 files changed, 74 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
-index 89863a35c731..5c2abc9eca9c 100644
--- a/drivers/gpu/drm/drm_of.c
-+++ b/drivers/gpu/drm/drm_of.c
-@@ -341,8 +341,23 @@ static int drm_of_lvds_get_remote_pixels_type(
- 	return pixels_type;
- }
- 
-+static int __drm_of_lvds_get_dual_link_pixel_order(int p1_pt, int p2_pt)
-+{
-+	/*
-+	 * A valid dual-lVDS bus is found when one port is marked with
-+	 * "dual-lvds-even-pixels", and the other port is marked with
-+	 * "dual-lvds-odd-pixels", bail out if the markers are not right.
-+	 */
-+	if (p1_pt + p2_pt != DRM_OF_LVDS_EVEN + DRM_OF_LVDS_ODD)
-+		return -EINVAL;
-+
-+	return p1_pt == DRM_OF_LVDS_EVEN ?
-+		DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS :
-+		DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS;
-+}
-+
- /**
- * drm_of_lvds_get_dual_link_pixel_order - Get LVDS dual-link pixel order
-+ * drm_of_lvds_get_dual_link_pixel_order - Get LVDS dual-link source pixel order
-  * @port1: First DT port node of the Dual-link LVDS source
-  * @port2: Second DT port node of the Dual-link LVDS source
-  *
-@@ -387,19 +402,58 @@ int drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1,
- 	if (remote_p2_pt < 0)
- 		return remote_p2_pt;
- 
-	/*
-	 * A valid dual-lVDS bus is found when one remote port is marked with
-	 * "dual-lvds-even-pixels", and the other remote port is marked with
-	 * "dual-lvds-odd-pixels", bail out if the markers are not right.
-	 */
-	if (remote_p1_pt + remote_p2_pt != DRM_OF_LVDS_EVEN + DRM_OF_LVDS_ODD)
-+	return __drm_of_lvds_get_dual_link_pixel_order(remote_p1_pt, remote_p2_pt);
-+}
-+EXPORT_SYMBOL_GPL(drm_of_lvds_get_dual_link_pixel_order);
-+
-+/**
-+ * drm_of_lvds_get_dual_link_pixel_order_sink - Get LVDS dual-link sink pixel order
-+ * @port1: First DT port node of the Dual-link LVDS sink
-+ * @port2: Second DT port node of the Dual-link LVDS sink
-+ *
-+ * An LVDS dual-link connection is made of two links, with even pixels
-+ * transitting on one link, and odd pixels on the other link. This function
-+ * returns, for two ports of an LVDS dual-link sink, which port shall transmit
-+ * the even and odd pixels, based on the requirements of the sink.
-+ *
-+ * The pixel order is determined from the dual-lvds-even-pixels and
-+ * dual-lvds-odd-pixels properties in the sink's DT port nodes. If those
-+ * properties are not present, or if their usage is not valid, this function
-+ * returns -EINVAL.
-+ *
-+ * If either port is not connected, this function returns -EPIPE.
-+ *
-+ * @port1 and @port2 are typically DT sibling nodes, but may have different
-+ * parents when, for instance, two separate LVDS decoders receive the even and
-+ * odd pixels.
-+ *
-+ * Return:
-+ * * DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - @port1 receives even pixels and @port2
-+ *   receives odd pixels
-+ * * DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - @port1 receives odd pixels and @port2
-+ *   receives even pixels
-+ * * -EINVAL - @port1 or @port2 are NULL
-+ * * -EPIPE - when @port1 or @port2 are not connected
-+ */
-+int drm_of_lvds_get_dual_link_pixel_order_sink(struct device_node *port1,
-+					       struct device_node *port2)
-+{
-+	int sink_p1_pt, sink_p2_pt;
-+
-+	if (!port1 || !port2)
- 		return -EINVAL;
- 
-	return remote_p1_pt == DRM_OF_LVDS_EVEN ?
-		DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS :
-		DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS;
-+	sink_p1_pt = drm_of_lvds_get_port_pixels_type(port1);
-+	if (!sink_p1_pt)
-+		return -EPIPE;
-+
-+	sink_p2_pt = drm_of_lvds_get_port_pixels_type(port2);
-+	if (!sink_p2_pt)
-+		return -EPIPE;
-+
-+	return __drm_of_lvds_get_dual_link_pixel_order(sink_p1_pt, sink_p2_pt);
- }
-EXPORT_SYMBOL_GPL(drm_of_lvds_get_dual_link_pixel_order);
-+EXPORT_SYMBOL_GPL(drm_of_lvds_get_dual_link_pixel_order_sink);
- 
- /**
-  * drm_of_lvds_get_data_mapping - Get LVDS data mapping
-diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h
-index 02d1cdd7f798..7f0256dae3f1 100644
--- a/include/drm/drm_of.h
-+++ b/include/drm/drm_of.h
-@@ -52,6 +52,8 @@ int drm_of_find_panel_or_bridge(const struct device_node *np,
- 				struct drm_bridge **bridge);
- int drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1,
- 					  const struct device_node *port2);
-+int drm_of_lvds_get_dual_link_pixel_order_sink(struct device_node *port1,
-+					       struct device_node *port2);
- int drm_of_lvds_get_data_mapping(const struct device_node *port);
- int drm_of_get_data_lanes_count(const struct device_node *endpoint,
- 				const unsigned int min, const unsigned int max);
-@@ -109,6 +111,13 @@ drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1,
- 	return -EINVAL;
- }
- 
-+static inline int
-+drm_of_lvds_get_dual_link_pixel_order_sink(struct device_node *port1,
-+					   struct device_node *port2)
-+{
-+	return -EINVAL;
-+}
-+
- static inline int
- drm_of_lvds_get_data_mapping(const struct device_node *port)
- {
@@ -1,80 +0,0 @@
-From 901dd3cc12ff3e8ac7f361892ee04cfb44a4df76 Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:28:00 +0800
-Subject: [PATCH 30/35] dt-bindings: display: lvds-data-mapping: Add 30-bit RGB
- pixel data mappings
-Organization: Wires
-
-Add "jeida-30" and "vesa-30" data mappings that are compatible with JEIDA
-and VESA respectively.
-
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-8-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- .../bindings/display/lvds-data-mapping.yaml   | 31 +++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/display/lvds-data-mapping.yaml b/Documentation/devicetree/bindings/display/lvds-data-mapping.yaml
-index d68982fe2e9b..ab842594feb9 100644
--- a/Documentation/devicetree/bindings/display/lvds-data-mapping.yaml
-+++ b/Documentation/devicetree/bindings/display/lvds-data-mapping.yaml
-@@ -26,12 +26,17 @@ description: |
-   Device compatible with those specifications have been marketed under the
-   FPD-Link and FlatLink brands.
- 
-+  This bindings also supports 30-bit data mapping compatible with JEIDA and
-+  VESA.
-+
- properties:
-   data-mapping:
-     enum:
-       - jeida-18
-       - jeida-24
-+      - jeida-30
-       - vesa-24
-+      - vesa-30
-     description: |
-       The color signals mapping order.
- 
-@@ -60,6 +65,19 @@ properties:
-       DATA2     ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
-       DATA3     ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
- 
-+      - "jeida-30" - 30-bit data mapping compatible with JEIDA and VESA. Data
-+        are transferred as follows on 5 LVDS lanes.
-+
-+      Slot          0       1       2       3       4       5       6
-+                ________________                         _________________
-+      Clock                     \_______________________/
-+                  ______  ______  ______  ______  ______  ______  ______
-+      DATA0     ><__G4__><__R9__><__R8__><__R7__><__R6__><__R5__><__R4__><
-+      DATA1     ><__B5__><__B4__><__G9__><__G8__><__G7__><__G6__><__G5__><
-+      DATA2     ><_CTL2_><_CTL1_><_CTL0_><__B9__><__B8__><__B7__><__B6__><
-+      DATA3     ><_CTL3_><__B3__><__B2__><__G3__><__G2__><__R3__><__R2__><
-+      DATA4     ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
-+
-       - "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
-         Data are transferred as follows on 4 LVDS lanes.
- 
-@@ -72,6 +90,19 @@ properties:
-       DATA2     ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
-       DATA3     ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
- 
-+      - "vesa-30" - 30-bit data mapping compatible with VESA. Data are
-+        transferred as follows on 5 LVDS lanes.
-+
-+      Slot          0       1       2       3       4       5       6
-+                ________________                         _________________
-+      Clock                     \_______________________/
-+                  ______  ______  ______  ______  ______  ______  ______
-+      DATA0     ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
-+      DATA1     ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
-+      DATA2     ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
-+      DATA3     ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
-+      DATA4     ><_CTL3_><__B9__><__B8__><__G9__><__G8__><__R9__><__R8__><
-+
-       Control signals are mapped as follows.
- 
-       CTL0: HSync
@@ -1,187 +0,0 @@
-From 34bc3735912c7af9b7c1f600bac60482d1879c3f Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:28:01 +0800
-Subject: [PATCH 31/35] dt-bindings: display: Document dual-link LVDS display
- common properties
-Organization: Wires
-
-Dual-link LVDS displays receive odd pixels and even pixels separately from
-dual LVDS links.  One link receives odd pixels and the other receives even
-pixels.  Some of those displays may also use only one LVDS link to receive
-all pixels, being odd and even agnostic.  Document common properties for
-those displays by extending LVDS display common properties defined in
-lvds.yaml.
-
-Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-9-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- .../bindings/display/lvds-dual-ports.yaml     | 63 +++++++++++++++++++
- .../display/panel/advantech,idk-2121wr.yaml   | 14 +----
- .../panel/panel-simple-lvds-dual-ports.yaml   | 20 +-----
- 3 files changed, 65 insertions(+), 32 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/display/lvds-dual-ports.yaml
-
-diff --git a/Documentation/devicetree/bindings/display/lvds-dual-ports.yaml b/Documentation/devicetree/bindings/display/lvds-dual-ports.yaml
-new file mode 100644
-index 000000000000..785701fe1590
--- /dev/null
-+++ b/Documentation/devicetree/bindings/display/lvds-dual-ports.yaml
-@@ -0,0 +1,63 @@
-+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/display/lvds-dual-ports.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: Dual-link LVDS Display Common Properties
-+
-+maintainers:
-+  - Liu Ying <victor.liu@nxp.com>
-+
-+description: |
-+  Common properties for LVDS displays with dual LVDS links. Extend LVDS display
-+  common properties defined in lvds.yaml.
-+
-+  Dual-link LVDS displays receive odd pixels and even pixels separately from
-+  the dual LVDS links. One link receives odd pixels and the other receives
-+  even pixels. Some of those displays may also use only one LVDS link to
-+  receive all pixels, being odd and even agnostic.
-+
-+allOf:
-+  - $ref: lvds.yaml#
-+
-+properties:
-+  ports:
-+    $ref: /schemas/graph.yaml#/properties/ports
-+
-+    patternProperties:
-+      '^port@[01]$':
-+        $ref: /schemas/graph.yaml#/$defs/port-base
-+        unevaluatedProperties: false
-+        description: |
-+          port@0 represents the first LVDS input link.
-+          port@1 represents the second LVDS input link.
-+
-+        properties:
-+          dual-lvds-odd-pixels:
-+            type: boolean
-+            description: LVDS input link for odd pixels
-+
-+          dual-lvds-even-pixels:
-+            type: boolean
-+            description: LVDS input link for even pixels
-+
-+        oneOf:
-+          - required: [dual-lvds-odd-pixels]
-+          - required: [dual-lvds-even-pixels]
-+          - properties:
-+              dual-lvds-odd-pixels: false
-+              dual-lvds-even-pixels: false
-+
-+    anyOf:
-+      - required:
-+          - port@0
-+      - required:
-+          - port@1
-+
-+required:
-+  - ports
-+
-+additionalProperties: true
-+
-+...
-diff --git a/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml b/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml
-index 2e8dbdb5a3d5..05ca3b2385f8 100644
--- a/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml
-+++ b/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml
-@@ -20,6 +20,7 @@ description: |
-   dual-lvds-odd-pixels or dual-lvds-even-pixels).
- 
- allOf:
-+  - $ref: /schemas/display/lvds-dual-ports.yaml#
-   - $ref: panel-common.yaml#
- 
- properties:
-@@ -44,22 +45,10 @@ properties:
- 
-     properties:
-       port@0:
-        $ref: /schemas/graph.yaml#/$defs/port-base
-        unevaluatedProperties: false
-        description: The sink for odd pixels.
-        properties:
-          dual-lvds-odd-pixels: true
-
-         required:
-           - dual-lvds-odd-pixels
- 
-       port@1:
-        $ref: /schemas/graph.yaml#/$defs/port-base
-        unevaluatedProperties: false
-        description: The sink for even pixels.
-        properties:
-          dual-lvds-even-pixels: true
-
-         required:
-           - dual-lvds-even-pixels
- 
-@@ -75,7 +64,6 @@ required:
-   - height-mm
-   - data-mapping
-   - panel-timing
-  - ports
- 
- examples:
-   - |+
-diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml
-index 10ed4b57232b..e80fc7006984 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml
-+++ b/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml
-@@ -22,6 +22,7 @@ description: |
-   If the panel is more advanced a dedicated binding file is required.
- 
- allOf:
-+  - $ref: /schemas/display/lvds-dual-ports.yaml#
-   - $ref: panel-common.yaml#
- 
- properties:
-@@ -55,28 +56,10 @@ properties:
- 
-     properties:
-       port@0:
-        $ref: /schemas/graph.yaml#/$defs/port-base
-        unevaluatedProperties: false
-        description: The first sink port.
-
-        properties:
-          dual-lvds-odd-pixels:
-            type: boolean
-            description: The first sink port for odd pixels.
-
-         required:
-           - dual-lvds-odd-pixels
- 
-       port@1:
-        $ref: /schemas/graph.yaml#/$defs/port-base
-        unevaluatedProperties: false
-        description: The second sink port.
-
-        properties:
-          dual-lvds-even-pixels:
-            type: boolean
-            description: The second sink port for even pixels.
-
-         required:
-           - dual-lvds-even-pixels
- 
-@@ -88,7 +71,6 @@ unevaluatedProperties: false
- 
- required:
-   - compatible
-  - ports
-   - power-supply
- 
- examples:
@@ -1,278 +0,0 @@
-From 40d2762755d7f6b404edb1e2baa28ef62e8b4973 Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:28:02 +0800
-Subject: [PATCH 32/35] dt-bindings: display: bridge: Add ITE IT6263 LVDS to
- HDMI converter
-Organization: Wires
-
-Document ITE IT6263 LVDS to HDMI converter.
-
-Product link:
-https://www.ite.com.tw/en/product/cate1/IT6263
-
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
-Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-10-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- .../bindings/display/bridge/ite,it6263.yaml   | 250 ++++++++++++++++++
- 1 file changed, 250 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml
-
-diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml
-new file mode 100644
-index 000000000000..0a10e10d80ff
--- /dev/null
-+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml
-@@ -0,0 +1,250 @@
-+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: ITE IT6263 LVDS to HDMI converter
-+
-+maintainers:
-+  - Liu Ying <victor.liu@nxp.com>
-+
-+description: |
-+  The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
-+  to HDMI converter.  Combined with LVDS receiver and HDMI 1.4a transmitter,
-+  the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
-+  The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
-+  and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
-+  1.2 and backward compatible with DVI 1.0 specification.
-+
-+  The IT6263 also encodes and transmits up to 8 channels of I2S digital audio,
-+  with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
-+  an S/PDIF input port takes in compressed audio of up to 192KHz frame rate.
-+
-+  The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
-+  provided by the IT6263 in two interfaces: the four I2S input ports or the
-+  S/PDIF input port.  With both interfaces the highest possible HBR frame rate
-+  is supported at up to 768KHz.
-+
-+allOf:
-+  - $ref: /schemas/display/lvds-dual-ports.yaml#
-+
-+properties:
-+  compatible:
-+    const: ite,it6263
-+
-+  reg:
-+    maxItems: 1
-+
-+  clocks:
-+    maxItems: 1
-+    description: audio master clock
-+
-+  clock-names:
-+    const: mclk
-+
-+  data-mapping:
-+    enum:
-+      - jeida-18
-+      - jeida-24
-+      - jeida-30
-+      - vesa-24
-+      - vesa-30
-+
-+  reset-gpios:
-+    maxItems: 1
-+
-+  ivdd-supply:
-+    description: 1.8V digital logic power
-+
-+  ovdd-supply:
-+    description: 3.3V I/O pin power
-+
-+  txavcc18-supply:
-+    description: 1.8V HDMI analog frontend power
-+
-+  txavcc33-supply:
-+    description: 3.3V HDMI analog frontend power
-+
-+  pvcc1-supply:
-+    description: 1.8V HDMI frontend core PLL power
-+
-+  pvcc2-supply:
-+    description: 1.8V HDMI frontend filter PLL power
-+
-+  avcc-supply:
-+    description: 3.3V LVDS frontend power
-+
-+  anvdd-supply:
-+    description: 1.8V LVDS frontend analog power
-+
-+  apvdd-supply:
-+    description: 1.8V LVDS frontend PLL power
-+
-+  "#sound-dai-cells":
-+    const: 0
-+
-+  ite,i2s-audio-fifo-sources:
-+    $ref: /schemas/types.yaml#/definitions/uint32-array
-+    minItems: 1
-+    maxItems: 4
-+    items:
-+      enum: [0, 1, 2, 3]
-+    description:
-+      Each array element indicates the pin number of an I2S serial data input
-+      line which is connected to an audio FIFO, from audio FIFO0 to FIFO3.
-+
-+  ite,rl-channel-swap-audio-sources:
-+    $ref: /schemas/types.yaml#/definitions/uint32-array
-+    minItems: 1
-+    maxItems: 4
-+    uniqueItems: true
-+    items:
-+      enum: [0, 1, 2, 3]
-+    description:
-+      Each array element indicates an audio source whose right channel and left
-+      channel are swapped by this converter. For I2S, the element is the pin
-+      number of an I2S serial data input line. For S/PDIF, the element is always
-+      0.
-+
-+  ports:
-+    $ref: /schemas/graph.yaml#/properties/ports
-+
-+    properties:
-+      port@0: true
-+
-+      port@1:
-+        oneOf:
-+          - required: [dual-lvds-odd-pixels]
-+          - required: [dual-lvds-even-pixels]
-+
-+      port@2:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description: video port for the HDMI output
-+
-+      port@3:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description: sound input port
-+
-+    required:
-+      - port@0
-+      - port@2
-+
-+required:
-+  - compatible
-+  - reg
-+  - data-mapping
-+  - ivdd-supply
-+  - ovdd-supply
-+  - txavcc18-supply
-+  - txavcc33-supply
-+  - pvcc1-supply
-+  - pvcc2-supply
-+  - avcc-supply
-+  - anvdd-supply
-+  - apvdd-supply
-+
-+unevaluatedProperties: false
-+
-+examples:
-+  - |
-+    /* single-link LVDS input */
-+    #include <dt-bindings/gpio/gpio.h>
-+
-+    i2c {
-+        #address-cells = <1>;
-+        #size-cells = <0>;
-+
-+        hdmi@4c {
-+            compatible = "ite,it6263";
-+            reg = <0x4c>;
-+            data-mapping = "jeida-24";
-+            reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-+            ivdd-supply = <&reg_buck5>;
-+            ovdd-supply = <&reg_vext_3v3>;
-+            txavcc18-supply = <&reg_buck5>;
-+            txavcc33-supply = <&reg_vext_3v3>;
-+            pvcc1-supply = <&reg_buck5>;
-+            pvcc2-supply = <&reg_buck5>;
-+            avcc-supply = <&reg_vext_3v3>;
-+            anvdd-supply = <&reg_buck5>;
-+            apvdd-supply = <&reg_buck5>;
-+
-+            ports {
-+                #address-cells = <1>;
-+                #size-cells = <0>;
-+
-+                port@0 {
-+                    reg = <0>;
-+
-+                    it6263_lvds_link1: endpoint {
-+                        remote-endpoint = <&ldb_lvds_ch0>;
-+                    };
-+                };
-+
-+                port@2 {
-+                    reg = <2>;
-+
-+                    it6263_out: endpoint {
-+                        remote-endpoint = <&hdmi_in>;
-+                    };
-+                };
-+            };
-+        };
-+    };
-+
-+  - |
-+    /* dual-link LVDS input */
-+    #include <dt-bindings/gpio/gpio.h>
-+
-+    i2c {
-+        #address-cells = <1>;
-+        #size-cells = <0>;
-+
-+        hdmi@4c {
-+            compatible = "ite,it6263";
-+            reg = <0x4c>;
-+            data-mapping = "jeida-24";
-+            reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-+            ivdd-supply = <&reg_buck5>;
-+            ovdd-supply = <&reg_vext_3v3>;
-+            txavcc18-supply = <&reg_buck5>;
-+            txavcc33-supply = <&reg_vext_3v3>;
-+            pvcc1-supply = <&reg_buck5>;
-+            pvcc2-supply = <&reg_buck5>;
-+            avcc-supply = <&reg_vext_3v3>;
-+            anvdd-supply = <&reg_buck5>;
-+            apvdd-supply = <&reg_buck5>;
-+
-+            ports {
-+                #address-cells = <1>;
-+                #size-cells = <0>;
-+
-+                port@0 {
-+                    reg = <0>;
-+                    dual-lvds-odd-pixels;
-+
-+                    it6263_lvds_link1_dual: endpoint {
-+                        remote-endpoint = <&ldb_lvds_ch0>;
-+                    };
-+                };
-+
-+                port@1 {
-+                    reg = <1>;
-+                    dual-lvds-even-pixels;
-+
-+                    it6263_lvds_link2_dual: endpoint {
-+                        remote-endpoint = <&ldb_lvds_ch1>;
-+                    };
-+                };
-+
-+                port@2 {
-+                    reg = <2>;
-+
-+                    it6263_out_dual: endpoint {
-+                        remote-endpoint = <&hdmi_in>;
-+                    };
-+                };
-+            };
-+        };
-+    };
@@ -1,966 +0,0 @@
-From aa3f6b62a24979e579323e77c8900064e7c725f1 Mon Sep 17 00:00:00 2001
-From: Liu Ying <victor.liu@nxp.com>
-Date: Mon, 4 Nov 2024 11:28:03 +0800
-Subject: [PATCH 33/35] drm/bridge: Add ITE IT6263 LVDS to HDMI converter
-Organization: Wires
-
-Add basic HDMI video output support. Currently, only RGB888 output
-pixel format is supported.  At the LVDS input side, the driver
-supports single LVDS link and dual LVDS links with "jeida-24" LVDS
-mapping.
-
-Product link:
-https://www.ite.com.tw/en/product/cate1/IT6263
-
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
-Acked-by: Maxime Ripard <mripard@kernel.org>
-Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-11-victor.liu@nxp.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- drivers/gpu/drm/bridge/Kconfig      |  11 +
- drivers/gpu/drm/bridge/Makefile     |   1 +
- drivers/gpu/drm/bridge/ite-it6263.c | 898 ++++++++++++++++++++++++++++
- 3 files changed, 910 insertions(+)
- create mode 100644 drivers/gpu/drm/bridge/ite-it6263.c
-
-diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
-index 3eb955333c80..676286542706 100644
--- a/drivers/gpu/drm/bridge/Kconfig
-+++ b/drivers/gpu/drm/bridge/Kconfig
-@@ -90,6 +90,17 @@ config DRM_FSL_LDB
- 	help
- 	  Support for i.MX8MP DPI-to-LVDS on-SoC encoder.
- 
-+config DRM_ITE_IT6263
-+	tristate "ITE IT6263 LVDS/HDMI bridge"
-+	depends on OF
-+	select DRM_DISPLAY_HDMI_STATE_HELPER
-+	select DRM_DISPLAY_HELPER
-+	select DRM_BRIDGE_CONNECTOR
-+	select DRM_KMS_HELPER
-+	select REGMAP_I2C
-+	help
-+	  ITE IT6263 LVDS to HDMI bridge chip driver.
-+
- config DRM_ITE_IT6505
- 	tristate "ITE IT6505 DisplayPort bridge"
- 	depends on OF
-diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
-index 7df87b582dca..f3776dd473fd 100644
--- a/drivers/gpu/drm/bridge/Makefile
-+++ b/drivers/gpu/drm/bridge/Makefile
-@@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o
- obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o
- obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o
- obj-$(CONFIG_DRM_FSL_LDB) += fsl-ldb.o
-+obj-$(CONFIG_DRM_ITE_IT6263) += ite-it6263.o
- obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o
- obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o
- obj-$(CONFIG_DRM_LONTIUM_LT9211) += lontium-lt9211.o
-diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
-new file mode 100644
-index 000000000000..cbabd4e20d3e
--- /dev/null
-+++ b/drivers/gpu/drm/bridge/ite-it6263.c
-@@ -0,0 +1,898 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Copyright 2024 NXP
-+ */
-+
-+#include <linux/bitfield.h>
-+#include <linux/bits.h>
-+#include <linux/delay.h>
-+#include <linux/gpio/consumer.h>
-+#include <linux/hdmi.h>
-+#include <linux/i2c.h>
-+#include <linux/media-bus-format.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/regmap.h>
-+#include <linux/regulator/consumer.h>
-+
-+#include <drm/display/drm_hdmi_helper.h>
-+#include <drm/display/drm_hdmi_state_helper.h>
-+#include <drm/drm_atomic.h>
-+#include <drm/drm_atomic_helper.h>
-+#include <drm/drm_atomic_state_helper.h>
-+#include <drm/drm_bridge.h>
-+#include <drm/drm_bridge_connector.h>
-+#include <drm/drm_connector.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_edid.h>
-+#include <drm/drm_of.h>
-+#include <drm/drm_probe_helper.h>
-+
-+/* -----------------------------------------------------------------------------
-+ * LVDS registers
-+ */
-+
-+/* LVDS software reset registers */
-+#define LVDS_REG_05			0x05
-+#define  REG_SOFT_P_RST			BIT(1)
-+
-+/* LVDS system configuration registers */
-+/* 0x0b */
-+#define LVDS_REG_0B			0x0b
-+#define  REG_SSC_PCLK_RF		BIT(0)
-+#define  REG_LVDS_IN_SWAP		BIT(1)
-+
-+/* LVDS test pattern gen control registers */
-+/* 0x2c */
-+#define LVDS_REG_2C			0x2c
-+#define  REG_COL_DEP			GENMASK(1, 0)
-+#define  BIT8				FIELD_PREP(REG_COL_DEP, 1)
-+#define  OUT_MAP			BIT(4)
-+#define  JEIDA				0
-+#define  REG_DESSC_ENB			BIT(6)
-+#define  DMODE				BIT(7)
-+#define  DISO				BIT(7)
-+#define  SISO				0
-+
-+#define LVDS_REG_3C			0x3c
-+#define LVDS_REG_3F			0x3f
-+#define LVDS_REG_47			0x47
-+#define LVDS_REG_48			0x48
-+#define LVDS_REG_4F			0x4f
-+#define LVDS_REG_52			0x52
-+
-+/* -----------------------------------------------------------------------------
-+ * HDMI registers are separated into three banks:
-+ * 1) HDMI register common bank: 0x00 ~ 0x2f
-+ */
-+
-+/* HDMI genernal registers */
-+#define HDMI_REG_SW_RST			0x04
-+#define  SOFTREF_RST			BIT(5)
-+#define  SOFTA_RST			BIT(4)
-+#define  SOFTV_RST			BIT(3)
-+#define  AUD_RST			BIT(2)
-+#define  HDCP_RST			BIT(0)
-+#define  HDMI_RST_ALL			(SOFTREF_RST | SOFTA_RST | SOFTV_RST | \
-+					 AUD_RST | HDCP_RST)
-+
-+#define HDMI_REG_SYS_STATUS		0x0e
-+#define  HPDETECT			BIT(6)
-+#define  TXVIDSTABLE			BIT(4)
-+
-+#define HDMI_REG_BANK_CTRL		0x0f
-+#define  REG_BANK_SEL			BIT(0)
-+
-+/* HDMI System DDC control registers */
-+#define HDMI_REG_DDC_MASTER_CTRL	0x10
-+#define  MASTER_SEL_HOST		BIT(0)
-+
-+#define HDMI_REG_DDC_HEADER		0x11
-+
-+#define HDMI_REG_DDC_REQOFF		0x12
-+#define HDMI_REG_DDC_REQCOUNT		0x13
-+#define HDMI_REG_DDC_EDIDSEG		0x14
-+
-+#define HDMI_REG_DDC_CMD		0x15
-+#define  DDC_CMD_EDID_READ		0x3
-+#define  DDC_CMD_FIFO_CLR		0x9
-+
-+#define HDMI_REG_DDC_STATUS		0x16
-+#define  DDC_DONE			BIT(7)
-+#define  DDC_NOACK			BIT(5)
-+#define  DDC_WAITBUS			BIT(4)
-+#define  DDC_ARBILOSE			BIT(3)
-+#define  DDC_ERROR			(DDC_NOACK | DDC_WAITBUS | DDC_ARBILOSE)
-+
-+#define HDMI_DDC_FIFO_BYTES		32
-+#define HDMI_REG_DDC_READFIFO		0x17
-+#define HDMI_REG_LVDS_PORT		0x1d /* LVDS input control I2C addr */
-+#define HDMI_REG_LVDS_PORT_EN		0x1e
-+#define LVDS_INPUT_CTRL_I2C_ADDR	0x33
-+
-+/* -----------------------------------------------------------------------------
-+ * 2) HDMI register bank0: 0x30 ~ 0xff
-+ */
-+
-+/* HDMI AFE registers */
-+#define HDMI_REG_AFE_DRV_CTRL		0x61
-+#define  AFE_DRV_PWD			BIT(5)
-+#define  AFE_DRV_RST			BIT(4)
-+
-+#define HDMI_REG_AFE_XP_CTRL		0x62
-+#define  AFE_XP_GAINBIT			BIT(7)
-+#define  AFE_XP_ER0			BIT(4)
-+#define  AFE_XP_RESETB			BIT(3)
-+
-+#define HDMI_REG_AFE_ISW_CTRL		0x63
-+
-+#define HDMI_REG_AFE_IP_CTRL		0x64
-+#define  AFE_IP_GAINBIT			BIT(7)
-+#define  AFE_IP_ER0			BIT(3)
-+#define  AFE_IP_RESETB			BIT(2)
-+
-+/* HDMI input data format registers */
-+#define HDMI_REG_INPUT_MODE		0x70
-+#define  IN_RGB				0x00
-+
-+/* HDMI general control registers */
-+#define HDMI_REG_HDMI_MODE		0xc0
-+#define  TX_HDMI_MODE			BIT(0)
-+
-+#define HDMI_REG_GCP			0xc1
-+#define  AVMUTE				BIT(0)
-+#define  HDMI_COLOR_DEPTH		GENMASK(6, 4)
-+#define  HDMI_COLOR_DEPTH_24		FIELD_PREP(HDMI_COLOR_DEPTH, 4)
-+
-+#define HDMI_REG_PKT_GENERAL_CTRL	0xc6
-+#define HDMI_REG_AVI_INFOFRM_CTRL	0xcd
-+#define  ENABLE_PKT			BIT(0)
-+#define  REPEAT_PKT			BIT(1)
-+
-+/* -----------------------------------------------------------------------------
-+ * 3) HDMI register bank1: 0x130 ~ 0x1ff (HDMI packet registers)
-+ */
-+
-+/* AVI packet registers */
-+#define HDMI_REG_AVI_DB1		0x158
-+#define HDMI_REG_AVI_DB2		0x159
-+#define HDMI_REG_AVI_DB3		0x15a
-+#define HDMI_REG_AVI_DB4		0x15b
-+#define HDMI_REG_AVI_DB5		0x15c
-+#define HDMI_REG_AVI_CSUM		0x15d
-+#define HDMI_REG_AVI_DB6		0x15e
-+#define HDMI_REG_AVI_DB7		0x15f
-+#define HDMI_REG_AVI_DB8		0x160
-+#define HDMI_REG_AVI_DB9		0x161
-+#define HDMI_REG_AVI_DB10		0x162
-+#define HDMI_REG_AVI_DB11		0x163
-+#define HDMI_REG_AVI_DB12		0x164
-+#define HDMI_REG_AVI_DB13		0x165
-+
-+#define HDMI_AVI_DB_CHUNK1_SIZE		(HDMI_REG_AVI_DB5 - HDMI_REG_AVI_DB1 + 1)
-+#define HDMI_AVI_DB_CHUNK2_SIZE		(HDMI_REG_AVI_DB13 - HDMI_REG_AVI_DB6 + 1)
-+
-+/* IT6263 data sheet Rev0.8: LVDS RX supports input clock rate up to 150MHz. */
-+#define MAX_PIXEL_CLOCK_KHZ		150000
-+
-+/* IT6263 programming guide Ver0.90: PCLK_HIGH for TMDS clock over 80MHz. */
-+#define HIGH_PIXEL_CLOCK_KHZ		80000
-+
-+/*
-+ * IT6263 data sheet Rev0.8: HDMI TX supports link speeds of up to 2.25Gbps
-+ * (link clock rate of 225MHz).
-+ */
-+#define MAX_HDMI_TMDS_CHAR_RATE_HZ	225000000
-+
-+struct it6263 {
-+	struct device *dev;
-+	struct i2c_client *hdmi_i2c;
-+	struct i2c_client *lvds_i2c;
-+	struct regmap *hdmi_regmap;
-+	struct regmap *lvds_regmap;
-+	struct drm_bridge bridge;
-+	struct drm_bridge *next_bridge;
-+	int lvds_data_mapping;
-+	bool lvds_dual_link;
-+	bool lvds_link12_swap;
-+};
-+
-+static inline struct it6263 *bridge_to_it6263(struct drm_bridge *bridge)
-+{
-+	return container_of(bridge, struct it6263, bridge);
-+}
-+
-+static bool it6263_hdmi_writeable_reg(struct device *dev, unsigned int reg)
-+{
-+	switch (reg) {
-+	case HDMI_REG_SW_RST:
-+	case HDMI_REG_BANK_CTRL:
-+	case HDMI_REG_DDC_MASTER_CTRL:
-+	case HDMI_REG_DDC_HEADER:
-+	case HDMI_REG_DDC_REQOFF:
-+	case HDMI_REG_DDC_REQCOUNT:
-+	case HDMI_REG_DDC_EDIDSEG:
-+	case HDMI_REG_DDC_CMD:
-+	case HDMI_REG_LVDS_PORT:
-+	case HDMI_REG_LVDS_PORT_EN:
-+	case HDMI_REG_AFE_DRV_CTRL:
-+	case HDMI_REG_AFE_XP_CTRL:
-+	case HDMI_REG_AFE_ISW_CTRL:
-+	case HDMI_REG_AFE_IP_CTRL:
-+	case HDMI_REG_INPUT_MODE:
-+	case HDMI_REG_HDMI_MODE:
-+	case HDMI_REG_GCP:
-+	case HDMI_REG_PKT_GENERAL_CTRL:
-+	case HDMI_REG_AVI_INFOFRM_CTRL:
-+	case HDMI_REG_AVI_DB1:
-+	case HDMI_REG_AVI_DB2:
-+	case HDMI_REG_AVI_DB3:
-+	case HDMI_REG_AVI_DB4:
-+	case HDMI_REG_AVI_DB5:
-+	case HDMI_REG_AVI_CSUM:
-+	case HDMI_REG_AVI_DB6:
-+	case HDMI_REG_AVI_DB7:
-+	case HDMI_REG_AVI_DB8:
-+	case HDMI_REG_AVI_DB9:
-+	case HDMI_REG_AVI_DB10:
-+	case HDMI_REG_AVI_DB11:
-+	case HDMI_REG_AVI_DB12:
-+	case HDMI_REG_AVI_DB13:
-+		return true;
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool it6263_hdmi_readable_reg(struct device *dev, unsigned int reg)
-+{
-+	if (it6263_hdmi_writeable_reg(dev, reg))
-+		return true;
-+
-+	switch (reg) {
-+	case HDMI_REG_SYS_STATUS:
-+	case HDMI_REG_DDC_STATUS:
-+	case HDMI_REG_DDC_READFIFO:
-+		return true;
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool it6263_hdmi_volatile_reg(struct device *dev, unsigned int reg)
-+{
-+	switch (reg) {
-+	case HDMI_REG_SW_RST:
-+	case HDMI_REG_SYS_STATUS:
-+	case HDMI_REG_DDC_STATUS:
-+	case HDMI_REG_DDC_READFIFO:
-+		return true;
-+	default:
-+		return false;
-+	}
-+}
-+
-+static const struct regmap_range_cfg it6263_hdmi_range_cfg = {
-+	.range_min = 0x00,
-+	.range_max = HDMI_REG_AVI_DB13,
-+	.selector_reg = HDMI_REG_BANK_CTRL,
-+	.selector_mask = REG_BANK_SEL,
-+	.selector_shift = 0,
-+	.window_start = 0x00,
-+	.window_len = 0x100,
-+};
-+
-+static const struct regmap_config it6263_hdmi_regmap_config = {
-+	.name = "it6263-hdmi",
-+	.reg_bits = 8,
-+	.val_bits = 8,
-+	.writeable_reg = it6263_hdmi_writeable_reg,
-+	.readable_reg = it6263_hdmi_readable_reg,
-+	.volatile_reg = it6263_hdmi_volatile_reg,
-+	.max_register = HDMI_REG_AVI_DB13,
-+	.ranges = &it6263_hdmi_range_cfg,
-+	.num_ranges = 1,
-+	.cache_type = REGCACHE_MAPLE,
-+};
-+
-+static bool it6263_lvds_writeable_reg(struct device *dev, unsigned int reg)
-+{
-+	switch (reg) {
-+	case LVDS_REG_05:
-+	case LVDS_REG_0B:
-+	case LVDS_REG_2C:
-+	case LVDS_REG_3C:
-+	case LVDS_REG_3F:
-+	case LVDS_REG_47:
-+	case LVDS_REG_48:
-+	case LVDS_REG_4F:
-+	case LVDS_REG_52:
-+		return true;
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool it6263_lvds_readable_reg(struct device *dev, unsigned int reg)
-+{
-+	return it6263_lvds_writeable_reg(dev, reg);
-+}
-+
-+static bool it6263_lvds_volatile_reg(struct device *dev, unsigned int reg)
-+{
-+	return reg == LVDS_REG_05;
-+}
-+
-+static const struct regmap_config it6263_lvds_regmap_config = {
-+	.name = "it6263-lvds",
-+	.reg_bits = 8,
-+	.val_bits = 8,
-+	.writeable_reg = it6263_lvds_writeable_reg,
-+	.readable_reg = it6263_lvds_readable_reg,
-+	.volatile_reg = it6263_lvds_volatile_reg,
-+	.max_register = LVDS_REG_52,
-+	.cache_type = REGCACHE_MAPLE,
-+};
-+
-+static const char * const it6263_supplies[] = {
-+	"ivdd", "ovdd", "txavcc18", "txavcc33", "pvcc1", "pvcc2",
-+	"avcc", "anvdd", "apvdd"
-+};
-+
-+static int it6263_parse_dt(struct it6263 *it)
-+{
-+	struct device *dev = it->dev;
-+	struct device_node *port0, *port1;
-+	int ret = 0;
-+
-+	it->lvds_data_mapping = drm_of_lvds_get_data_mapping(dev->of_node);
-+	if (it->lvds_data_mapping < 0) {
-+		dev_err(dev, "%pOF: invalid or missing %s DT property: %d\n",
-+			dev->of_node, "data-mapping", it->lvds_data_mapping);
-+		return it->lvds_data_mapping;
-+	}
-+
-+	it->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 2, 0);
-+	if (IS_ERR(it->next_bridge))
-+		return dev_err_probe(dev, PTR_ERR(it->next_bridge),
-+				     "failed to get next bridge\n");
-+
-+	port0 = of_graph_get_port_by_id(dev->of_node, 0);
-+	port1 = of_graph_get_port_by_id(dev->of_node, 1);
-+	if (port0 && port1) {
-+		int order;
-+
-+		it->lvds_dual_link = true;
-+		order = drm_of_lvds_get_dual_link_pixel_order_sink(port0, port1);
-+		if (order < 0) {
-+			dev_err(dev,
-+				"failed to get dual link pixel order: %d\n",
-+				order);
-+			ret = order;
-+		} else if (order == DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS) {
-+			it->lvds_link12_swap = true;
-+		}
-+	} else if (port1) {
-+		ret = -EINVAL;
-+		dev_err(dev, "single input LVDS port1 is not supported\n");
-+	} else if (!port0) {
-+		ret = -EINVAL;
-+		dev_err(dev, "no input LVDS port\n");
-+	}
-+
-+	of_node_put(port0);
-+	of_node_put(port1);
-+
-+	return ret;
-+}
-+
-+static inline void it6263_hw_reset(struct gpio_desc *reset_gpio)
-+{
-+	if (!reset_gpio)
-+		return;
-+
-+	gpiod_set_value_cansleep(reset_gpio, 0);
-+	fsleep(1000);
-+	gpiod_set_value_cansleep(reset_gpio, 1);
-+	/* The chip maker says the low pulse should be at least 40ms. */
-+	fsleep(40000);
-+	gpiod_set_value_cansleep(reset_gpio, 0);
-+	/* addtional time to wait the high voltage to be stable */
-+	fsleep(5000);
-+}
-+
-+static inline int it6263_lvds_set_i2c_addr(struct it6263 *it)
-+{
-+	int ret;
-+
-+	ret = regmap_write(it->hdmi_regmap, HDMI_REG_LVDS_PORT,
-+			   LVDS_INPUT_CTRL_I2C_ADDR << 1);
-+	if (ret)
-+		return ret;
-+
-+	return regmap_write(it->hdmi_regmap, HDMI_REG_LVDS_PORT_EN, BIT(0));
-+}
-+
-+static inline void it6263_lvds_reset(struct it6263 *it)
-+{
-+	/* AFE PLL reset */
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, BIT(0), 0x0);
-+	fsleep(1000);
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, BIT(0), BIT(0));
-+
-+	/* software pixel clock domain reset */
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_05, REG_SOFT_P_RST,
-+			  REG_SOFT_P_RST);
-+	fsleep(1000);
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_05, REG_SOFT_P_RST, 0x0);
-+	fsleep(10000);
-+}
-+
-+static inline void it6263_lvds_set_interface(struct it6263 *it)
-+{
-+	/* color depth */
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
-+	/* output mapping */
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
-+
-+	if (it->lvds_dual_link) {
-+		regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
-+		regmap_write_bits(it->lvds_regmap, LVDS_REG_52, BIT(1), BIT(1));
-+	} else {
-+		regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, SISO);
-+		regmap_write_bits(it->lvds_regmap, LVDS_REG_52, BIT(1), 0);
-+	}
-+}
-+
-+static inline void it6263_lvds_set_afe(struct it6263 *it)
-+{
-+	regmap_write(it->lvds_regmap, LVDS_REG_3C, 0xaa);
-+	regmap_write(it->lvds_regmap, LVDS_REG_3F, 0x02);
-+	regmap_write(it->lvds_regmap, LVDS_REG_47, 0xaa);
-+	regmap_write(it->lvds_regmap, LVDS_REG_48, 0x02);
-+	regmap_write(it->lvds_regmap, LVDS_REG_4F, 0x11);
-+
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_0B, REG_SSC_PCLK_RF,
-+			  REG_SSC_PCLK_RF);
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, 0x07, 0);
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_DESSC_ENB,
-+			  REG_DESSC_ENB);
-+}
-+
-+static inline void it6263_lvds_sys_cfg(struct it6263 *it)
-+{
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_0B, REG_LVDS_IN_SWAP,
-+			  it->lvds_link12_swap ? REG_LVDS_IN_SWAP : 0);
-+}
-+
-+static inline void it6263_lvds_config(struct it6263 *it)
-+{
-+	it6263_lvds_reset(it);
-+	it6263_lvds_set_interface(it);
-+	it6263_lvds_set_afe(it);
-+	it6263_lvds_sys_cfg(it);
-+}
-+
-+static inline void it6263_hdmi_config(struct it6263 *it)
-+{
-+	regmap_write(it->hdmi_regmap, HDMI_REG_SW_RST, HDMI_RST_ALL);
-+	regmap_write(it->hdmi_regmap, HDMI_REG_INPUT_MODE, IN_RGB);
-+	regmap_write_bits(it->hdmi_regmap, HDMI_REG_GCP, HDMI_COLOR_DEPTH,
-+			  HDMI_COLOR_DEPTH_24);
-+}
-+
-+static enum drm_connector_status it6263_detect(struct it6263 *it)
-+{
-+	unsigned int val;
-+
-+	regmap_read(it->hdmi_regmap, HDMI_REG_SYS_STATUS, &val);
-+	if (val & HPDETECT)
-+		return connector_status_connected;
-+	else
-+		return connector_status_disconnected;
-+}
-+
-+static int it6263_read_edid(void *data, u8 *buf, unsigned int block, size_t len)
-+{
-+	struct it6263 *it = data;
-+	struct regmap *regmap = it->hdmi_regmap;
-+	unsigned int start = (block % 2) * EDID_LENGTH;
-+	unsigned int segment = block >> 1;
-+	unsigned int count, val;
-+	int ret;
-+
-+	regmap_write(regmap, HDMI_REG_DDC_MASTER_CTRL, MASTER_SEL_HOST);
-+	regmap_write(regmap, HDMI_REG_DDC_HEADER, DDC_ADDR << 1);
-+	regmap_write(regmap, HDMI_REG_DDC_EDIDSEG, segment);
-+
-+	while (len) {
-+		/* clear DDC FIFO */
-+		regmap_write(regmap, HDMI_REG_DDC_CMD, DDC_CMD_FIFO_CLR);
-+
-+		ret = regmap_read_poll_timeout(regmap, HDMI_REG_DDC_STATUS,
-+					       val, val & DDC_DONE,
-+					       2000, 10000);
-+		if (ret) {
-+			dev_err(it->dev, "failed to clear DDC FIFO:%d\n", ret);
-+			return ret;
-+		}
-+
-+		count = len > HDMI_DDC_FIFO_BYTES ? HDMI_DDC_FIFO_BYTES : len;
-+
-+		/* fire the read command */
-+		regmap_write(regmap, HDMI_REG_DDC_REQOFF, start);
-+		regmap_write(regmap, HDMI_REG_DDC_REQCOUNT, count);
-+		regmap_write(regmap, HDMI_REG_DDC_CMD, DDC_CMD_EDID_READ);
-+
-+		start += count;
-+		len -= count;
-+
-+		ret = regmap_read_poll_timeout(regmap, HDMI_REG_DDC_STATUS, val,
-+					       val & (DDC_DONE | DDC_ERROR),
-+					       20000, 250000);
-+		if (ret && !(val & DDC_ERROR)) {
-+			dev_err(it->dev, "failed to read EDID:%d\n", ret);
-+			return ret;
-+		}
-+
-+		if (val & DDC_ERROR) {
-+			dev_err(it->dev, "DDC error\n");
-+			return -EIO;
-+		}
-+
-+		/* cache to buffer */
-+		for (; count > 0; count--) {
-+			regmap_read(regmap, HDMI_REG_DDC_READFIFO, &val);
-+			*(buf++) = val;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int it6263_bridge_atomic_check(struct drm_bridge *bridge,
-+				      struct drm_bridge_state *bridge_state,
-+				      struct drm_crtc_state *crtc_state,
-+				      struct drm_connector_state *conn_state)
-+{
-+	return drm_atomic_helper_connector_hdmi_check(conn_state->connector,
-+						      conn_state->state);
-+}
-+
-+static void
-+it6263_bridge_atomic_disable(struct drm_bridge *bridge,
-+			     struct drm_bridge_state *old_bridge_state)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+
-+	regmap_write_bits(it->hdmi_regmap, HDMI_REG_GCP, AVMUTE, AVMUTE);
-+	regmap_write(it->hdmi_regmap, HDMI_REG_PKT_GENERAL_CTRL, 0);
-+	regmap_write(it->hdmi_regmap, HDMI_REG_AFE_DRV_CTRL,
-+		     AFE_DRV_RST | AFE_DRV_PWD);
-+}
-+
-+static void
-+it6263_bridge_atomic_enable(struct drm_bridge *bridge,
-+			    struct drm_bridge_state *old_bridge_state)
-+{
-+	struct drm_atomic_state *state = old_bridge_state->base.state;
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+	const struct drm_crtc_state *crtc_state;
-+	struct regmap *regmap = it->hdmi_regmap;
-+	const struct drm_display_mode *mode;
-+	struct drm_connector *connector;
-+	bool is_stable = false;
-+	struct drm_crtc *crtc;
-+	unsigned int val;
-+	bool pclk_high;
-+	int i, ret;
-+
-+	connector = drm_atomic_get_new_connector_for_encoder(state,
-+							     bridge->encoder);
-+	crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;
-+	crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
-+	mode = &crtc_state->adjusted_mode;
-+
-+	regmap_write(regmap, HDMI_REG_HDMI_MODE, TX_HDMI_MODE);
-+
-+	drm_atomic_helper_connector_hdmi_update_infoframes(connector, state);
-+
-+	/* HDMI AFE setup */
-+	pclk_high = mode->clock > HIGH_PIXEL_CLOCK_KHZ;
-+	regmap_write(regmap, HDMI_REG_AFE_DRV_CTRL, AFE_DRV_RST);
-+	if (pclk_high)
-+		regmap_write(regmap, HDMI_REG_AFE_XP_CTRL,
-+			     AFE_XP_GAINBIT | AFE_XP_RESETB);
-+	else
-+		regmap_write(regmap, HDMI_REG_AFE_XP_CTRL,
-+			     AFE_XP_ER0 | AFE_XP_RESETB);
-+	regmap_write(regmap, HDMI_REG_AFE_ISW_CTRL, 0x10);
-+	if (pclk_high)
-+		regmap_write(regmap, HDMI_REG_AFE_IP_CTRL,
-+			     AFE_IP_GAINBIT | AFE_IP_RESETB);
-+	else
-+		regmap_write(regmap, HDMI_REG_AFE_IP_CTRL,
-+			     AFE_IP_ER0 | AFE_IP_RESETB);
-+
-+	/* HDMI software video reset */
-+	regmap_write_bits(regmap, HDMI_REG_SW_RST, SOFTV_RST, SOFTV_RST);
-+	fsleep(1000);
-+	regmap_write_bits(regmap, HDMI_REG_SW_RST, SOFTV_RST, 0);
-+
-+	/* reconfigure LVDS and retry several times in case video is instable */
-+	for (i = 0; i < 3; i++) {
-+		ret = regmap_read_poll_timeout(regmap, HDMI_REG_SYS_STATUS, val,
-+					       val & TXVIDSTABLE,
-+					       20000, 500000);
-+		if (!ret) {
-+			is_stable = true;
-+			break;
-+		}
-+
-+		it6263_lvds_config(it);
-+	}
-+
-+	if (!is_stable)
-+		dev_warn(it->dev, "failed to wait for video stable\n");
-+
-+	/* HDMI AFE reset release and power up */
-+	regmap_write(regmap, HDMI_REG_AFE_DRV_CTRL, 0);
-+
-+	regmap_write_bits(regmap, HDMI_REG_GCP, AVMUTE, 0);
-+
-+	regmap_write(regmap, HDMI_REG_PKT_GENERAL_CTRL, ENABLE_PKT | REPEAT_PKT);
-+}
-+
-+static enum drm_mode_status
-+it6263_bridge_mode_valid(struct drm_bridge *bridge,
-+			 const struct drm_display_info *info,
-+			 const struct drm_display_mode *mode)
-+{
-+	unsigned long long rate;
-+
-+	rate = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_RGB);
-+	if (rate == 0)
-+		return MODE_NOCLOCK;
-+
-+	return bridge->funcs->hdmi_tmds_char_rate_valid(bridge, mode, rate);
-+}
-+
-+static int it6263_bridge_attach(struct drm_bridge *bridge,
-+				enum drm_bridge_attach_flags flags)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+	struct drm_connector *connector;
-+	int ret;
-+
-+	ret = drm_bridge_attach(bridge->encoder, it->next_bridge, bridge,
-+				flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
-+		return 0;
-+
-+	connector = drm_bridge_connector_init(bridge->dev, bridge->encoder);
-+	if (IS_ERR(connector)) {
-+		ret = PTR_ERR(connector);
-+		dev_err(it->dev, "failed to initialize bridge connector: %d\n",
-+			ret);
-+		return ret;
-+	}
-+
-+	drm_connector_attach_encoder(connector, bridge->encoder);
-+
-+	return 0;
-+}
-+
-+static enum drm_connector_status it6263_bridge_detect(struct drm_bridge *bridge)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+
-+	return it6263_detect(it);
-+}
-+
-+static const struct drm_edid *
-+it6263_bridge_edid_read(struct drm_bridge *bridge,
-+			struct drm_connector *connector)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+
-+	return drm_edid_read_custom(connector, it6263_read_edid, it);
-+}
-+
-+static u32 *
-+it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
-+					struct drm_bridge_state *bridge_state,
-+					struct drm_crtc_state *crtc_state,
-+					struct drm_connector_state *conn_state,
-+					u32 output_fmt,
-+					unsigned int *num_input_fmts)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+	u32 *input_fmts;
-+
-+	*num_input_fmts = 0;
-+
-+	if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
-+		return NULL;
-+
-+	input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
-+	if (!input_fmts)
-+		return NULL;
-+
-+	input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
-+	*num_input_fmts = 1;
-+
-+	return input_fmts;
-+}
-+
-+static enum drm_mode_status
-+it6263_hdmi_tmds_char_rate_valid(const struct drm_bridge *bridge,
-+				 const struct drm_display_mode *mode,
-+				 unsigned long long tmds_rate)
-+{
-+	if (mode->clock > MAX_PIXEL_CLOCK_KHZ)
-+		return MODE_CLOCK_HIGH;
-+
-+	if (tmds_rate > MAX_HDMI_TMDS_CHAR_RATE_HZ)
-+		return MODE_CLOCK_HIGH;
-+
-+	return MODE_OK;
-+}
-+
-+static int it6263_hdmi_clear_infoframe(struct drm_bridge *bridge,
-+				       enum hdmi_infoframe_type type)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+
-+	if (type == HDMI_INFOFRAME_TYPE_AVI)
-+		regmap_write(it->hdmi_regmap, HDMI_REG_AVI_INFOFRM_CTRL, 0);
-+	else
-+		dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type);
-+
-+	return 0;
-+}
-+
-+static int it6263_hdmi_write_infoframe(struct drm_bridge *bridge,
-+				       enum hdmi_infoframe_type type,
-+				       const u8 *buffer, size_t len)
-+{
-+	struct it6263 *it = bridge_to_it6263(bridge);
-+	struct regmap *regmap = it->hdmi_regmap;
-+
-+	if (type != HDMI_INFOFRAME_TYPE_AVI) {
-+		dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type);
-+		return 0;
-+	}
-+
-+	/* write the first AVI infoframe data byte chunk(DB1-DB5) */
-+	regmap_bulk_write(regmap, HDMI_REG_AVI_DB1,
-+			  &buffer[HDMI_INFOFRAME_HEADER_SIZE],
-+			  HDMI_AVI_DB_CHUNK1_SIZE);
-+
-+	/* write the second AVI infoframe data byte chunk(DB6-DB13) */
-+	regmap_bulk_write(regmap, HDMI_REG_AVI_DB6,
-+			  &buffer[HDMI_INFOFRAME_HEADER_SIZE +
-+				  HDMI_AVI_DB_CHUNK1_SIZE],
-+			  HDMI_AVI_DB_CHUNK2_SIZE);
-+
-+	/* write checksum */
-+	regmap_write(regmap, HDMI_REG_AVI_CSUM, buffer[3]);
-+
-+	regmap_write(regmap, HDMI_REG_AVI_INFOFRM_CTRL, ENABLE_PKT | REPEAT_PKT);
-+
-+	return 0;
-+}
-+
-+static const struct drm_bridge_funcs it6263_bridge_funcs = {
-+	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
-+	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
-+	.atomic_reset = drm_atomic_helper_bridge_reset,
-+	.attach = it6263_bridge_attach,
-+	.mode_valid = it6263_bridge_mode_valid,
-+	.atomic_disable = it6263_bridge_atomic_disable,
-+	.atomic_enable = it6263_bridge_atomic_enable,
-+	.atomic_check = it6263_bridge_atomic_check,
-+	.detect = it6263_bridge_detect,
-+	.edid_read = it6263_bridge_edid_read,
-+	.atomic_get_input_bus_fmts = it6263_bridge_atomic_get_input_bus_fmts,
-+	.hdmi_tmds_char_rate_valid = it6263_hdmi_tmds_char_rate_valid,
-+	.hdmi_clear_infoframe = it6263_hdmi_clear_infoframe,
-+	.hdmi_write_infoframe = it6263_hdmi_write_infoframe,
-+};
-+
-+static int it6263_probe(struct i2c_client *client)
-+{
-+	struct device *dev = &client->dev;
-+	struct gpio_desc *reset_gpio;
-+	struct it6263 *it;
-+	int ret;
-+
-+	it = devm_kzalloc(dev, sizeof(*it), GFP_KERNEL);
-+	if (!it)
-+		return -ENOMEM;
-+
-+	it->dev = dev;
-+	it->hdmi_i2c = client;
-+
-+	it->hdmi_regmap = devm_regmap_init_i2c(client,
-+					       &it6263_hdmi_regmap_config);
-+	if (IS_ERR(it->hdmi_regmap))
-+		return dev_err_probe(dev, PTR_ERR(it->hdmi_regmap),
-+				     "failed to init I2C regmap for HDMI\n");
-+
-+	reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
-+	if (IS_ERR(reset_gpio))
-+		return dev_err_probe(dev, PTR_ERR(reset_gpio),
-+				     "failed to get reset gpio\n");
-+
-+	ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(it6263_supplies),
-+					     it6263_supplies);
-+	if (ret)
-+		return dev_err_probe(dev, ret, "failed to get power supplies\n");
-+
-+	ret = it6263_parse_dt(it);
-+	if (ret)
-+		return ret;
-+
-+	it6263_hw_reset(reset_gpio);
-+
-+	ret = it6263_lvds_set_i2c_addr(it);
-+	if (ret)
-+		return dev_err_probe(dev, ret, "failed to set I2C addr\n");
-+
-+	it->lvds_i2c = devm_i2c_new_dummy_device(dev, client->adapter,
-+						 LVDS_INPUT_CTRL_I2C_ADDR);
-+	if (IS_ERR(it->lvds_i2c))
-+		dev_err_probe(it->dev, PTR_ERR(it->lvds_i2c),
-+			      "failed to allocate I2C device for LVDS\n");
-+
-+	it->lvds_regmap = devm_regmap_init_i2c(it->lvds_i2c,
-+					       &it6263_lvds_regmap_config);
-+	if (IS_ERR(it->lvds_regmap))
-+		return dev_err_probe(dev, PTR_ERR(it->lvds_regmap),
-+				     "failed to init I2C regmap for LVDS\n");
-+
-+	it6263_lvds_config(it);
-+	it6263_hdmi_config(it);
-+
-+	i2c_set_clientdata(client, it);
-+
-+	it->bridge.funcs = &it6263_bridge_funcs;
-+	it->bridge.of_node = dev->of_node;
-+	/* IT6263 chip doesn't support HPD interrupt. */
-+	it->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID |
-+			 DRM_BRIDGE_OP_HDMI;
-+	it->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
-+	it->bridge.vendor = "ITE";
-+	it->bridge.product = "IT6263";
-+
-+	return devm_drm_bridge_add(dev, &it->bridge);
-+}
-+
-+static const struct of_device_id it6263_of_match[] = {
-+	{ .compatible = "ite,it6263", },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, it6263_of_match);
-+
-+static const struct i2c_device_id it6263_i2c_ids[] = {
-+	{ "it6263", 0 },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(i2c, it6263_i2c_ids);
-+
-+static struct i2c_driver it6263_driver = {
-+	.probe = it6263_probe,
-+	.driver = {
-+		.name = "it6263",
-+		.of_match_table = it6263_of_match,
-+	},
-+	.id_table = it6263_i2c_ids,
-+};
-+module_i2c_driver(it6263_driver);
-+
-+MODULE_DESCRIPTION("ITE Tech. Inc. IT6263 LVDS/HDMI bridge");
-+MODULE_AUTHOR("Liu Ying <victor.liu@nxp.com>");
-+MODULE_LICENSE("GPL");
@@ -1,82 +0,0 @@
-From 40dbdab340dfc6c4392479d726999db6b4ed2713 Mon Sep 17 00:00:00 2001
-From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
-Date: Thu, 5 Dec 2024 09:02:10 +0100
-Subject: [PATCH 34/35] drm/bridge: ite-it6263: Support VESA-24 input format
-Organization: Wires
-
-Introduce it6263_is_input_bus_fmt_valid() and refactor the
-it6263_bridge_atomic_get_input_bus_fmts() function to support VESA-24
-format by selecting the LVDS input format based on the LVDS data mapping
-and thereby support both JEIDA-24 and VESA-24 input formats.
-
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
-Reviewed-by: Liu Ying <victor.liu@nxp.com>
-Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20241205080210.1285385-1-tommaso.merciai.xr@bp.renesas.com
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
- drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
- 1 file changed, 22 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
-index cbabd4e20d3e..3fc5c6795487 100644
--- a/drivers/gpu/drm/bridge/ite-it6263.c
-+++ b/drivers/gpu/drm/bridge/ite-it6263.c
-@@ -48,6 +48,7 @@
- #define  REG_COL_DEP			GENMASK(1, 0)
- #define  BIT8				FIELD_PREP(REG_COL_DEP, 1)
- #define  OUT_MAP			BIT(4)
-+#define  VESA				BIT(4)
- #define  JEIDA				0
- #define  REG_DESSC_ENB			BIT(6)
- #define  DMODE				BIT(7)
-@@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
- 	fsleep(10000);
- }
- 
-+static inline bool it6263_is_input_bus_fmt_valid(int input_fmt)
-+{
-+	switch (input_fmt) {
-+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
-+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
-+		return true;
-+	}
-+	return false;
-+}
-+
- static inline void it6263_lvds_set_interface(struct it6263 *it)
- {
-+	u8 fmt;
-+
- 	/* color depth */
- 	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
-+
-+	if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG)
-+		fmt = VESA;
-+	else
-+		fmt = JEIDA;
-+
- 	/* output mapping */
-	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
-+	regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt);
- 
- 	if (it->lvds_dual_link) {
- 		regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
-@@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
- 
- 	*num_input_fmts = 0;
- 
-	if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
-+	if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping))
- 		return NULL;
- 
- 	input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
- 	if (!input_fmts)
- 		return NULL;
- 
-	input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
-+	input_fmts[0] = it->lvds_data_mapping;
- 	*num_input_fmts = 1;
- 
- 	return input_fmts;
@@ -1,36 +0,0 @@
-From ee2b394cbd2efd3a38151bfb5b244012ab0f05b8 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@linaro.org>
-Date: Tue, 12 Nov 2024 13:23:03 +0300
-Subject: [PATCH 35/35] drm/bridge: ite-it6263: Prevent error pointer
- dereference in probe()
-Organization: Wires
-
-If devm_i2c_new_dummy_device() fails then we were supposed to return an
-error code, but instead the function continues and will crash on the next
-line.  Add the missing return statement.
-
-Fixes: 049723628716 ("drm/bridge: Add ITE IT6263 LVDS to HDMI converter")
-Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
-Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
-Reviewed-by: Liu Ying <victor.liu@nxp.com>
-Signed-off-by: Liu Ying <victor.liu@nxp.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/804a758b-f2e7-4116-b72d-29bc8905beed@stanley.mountain
---
- drivers/gpu/drm/bridge/ite-it6263.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
-index 3fc5c6795487..9608e83ca894 100644
--- a/drivers/gpu/drm/bridge/ite-it6263.c
-+++ b/drivers/gpu/drm/bridge/ite-it6263.c
-@@ -864,8 +864,8 @@ static int it6263_probe(struct i2c_client *client)
- 	it->lvds_i2c = devm_i2c_new_dummy_device(dev, client->adapter,
- 						 LVDS_INPUT_CTRL_I2C_ADDR);
- 	if (IS_ERR(it->lvds_i2c))
-		dev_err_probe(it->dev, PTR_ERR(it->lvds_i2c),
-			      "failed to allocate I2C device for LVDS\n");
-+		return dev_err_probe(it->dev, PTR_ERR(it->lvds_i2c),
-+				     "failed to allocate I2C device for LVDS\n");
- 
- 	it->lvds_regmap = devm_regmap_init_i2c(it->lvds_i2c,
- 					       &it6263_lvds_regmap_config);
@@ -1,7 +1,7 @@
-From 74f8ab9d77486305e12a075ad94d87f404429f66 Mon Sep 17 00:00:00 2001
+From 0c35a5314291a78047df920779fc55412e96c135 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 12 Mar 2024 10:27:24 +0100
-Subject: [PATCH 01/35] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for
+Subject: [PATCH 01/27] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for
 PPU on 6393X
 Organization: Wires

@@ -13,7 +13,7 @@ register 0, bit 15). Therefore, increase the timeout threshold to 1s.
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index df1df6015412..54c99357540d 100644
+index 211c219dd52d..d64c3eef4447 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -86,7 +86,7 @@ int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val)
@@ -1,7 +1,7 @@
-From bf88305dd98a52f698c6f866b76645a48728d628 Mon Sep 17 00:00:00 2001
+From a4d558c209f19f4d1e18f7e0ed8996102b7f875d Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 27 Mar 2024 15:52:43 +0100
-Subject: [PATCH 02/35] net: dsa: mv88e6xxx: Improve indirect register access
+Subject: [PATCH 02/27] net: dsa: mv88e6xxx: Improve indirect register access
 perf on 6393
 Organization: Wires

@@ -22,10 +22,10 @@ other accesses use the regular indirect interface.
 5 files changed, 119 insertions(+)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 54c99357540d..f6611496dc0f 100644
+index d64c3eef4447..47138492885e 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -6532,6 +6532,13 @@ static int mv88e6xxx_detect(struct mv88e6xxx_chip *chip)
+@@ -6539,6 +6539,13 @@ static int mv88e6xxx_detect(struct mv88e6xxx_chip *chip)
 	/* Update the compatible info with the probed one */
 	chip->info = info;
 
@@ -1,7 +1,7 @@
-From be5cc28a5bac1bc968a2d6b9892cc64d41aad9ac Mon Sep 17 00:00:00 2001
+From 57b19d8263f232d6b3d418fd7a4a71d1f00567bd Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Mon, 22 Apr 2024 23:18:01 +0200
-Subject: [PATCH 03/35] net: dsa: mv88e6xxx: Honor ports being managed via
+Subject: [PATCH 03/27] net: dsa: mv88e6xxx: Honor ports being managed via
 in-band-status
 Organization: Wires

@@ -18,7 +18,7 @@ when in-band-status is being used.
 1 file changed, 6 insertions(+)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index f6611496dc0f..216fbcfcd476 100644
+index 47138492885e..b96bc12dc6a8 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -964,6 +964,9 @@ static void mv88e6xxx_mac_link_down(struct phylink_config *config,
@@ -1,7 +1,7 @@
-From 0e7940b52ab43e1e97d523d8900927f2b82a54fe Mon Sep 17 00:00:00 2001
+From 8c83473996a0830e9d3f74792694de575d1ad6f4 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 24 Apr 2024 22:41:04 +0200
-Subject: [PATCH 04/35] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user
+Subject: [PATCH 04/27] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user
 ports on 6393X
 Organization: Wires

@@ -1,7 +1,7 @@
-From 6a7421879866a712d127e6588744019668b4d1bc Mon Sep 17 00:00:00 2001
+From ec095ae1520437c6ba73c354c63f11114b69ee5e Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Thu, 16 Nov 2023 19:44:32 +0100
-Subject: [PATCH 05/35] net: dsa: mv88e6xxx: Add LED infrastructure
+Subject: [PATCH 05/27] net: dsa: mv88e6xxx: Add LED infrastructure
 Organization: Wires

 Parse DT for LEDs and register them for devices that support it,
@@ -29,7 +29,7 @@ index a9a9651187db..6720d9303914 100644
 mv88e6xxx-objs += pcs-6352.o
 mv88e6xxx-objs += pcs-639x.o
 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 216fbcfcd476..8d386766d1ec 100644
+index b96bc12dc6a8..f92b7d7d5780 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -37,6 +37,7 @@
@@ -1,7 +1,7 @@
-From 2190bebac9c7205a4a513eabed45dc9cb3dee2bd Mon Sep 17 00:00:00 2001
+From 4c49605ae3cced0e0358a1b485ceb49c40e43de8 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Thu, 16 Nov 2023 21:59:35 +0100
-Subject: [PATCH 06/35] net: dsa: mv88e6xxx: Add LED support for 6393X
+Subject: [PATCH 06/27] net: dsa: mv88e6xxx: Add LED support for 6393X
 Organization: Wires

 Trigger support:
@@ -17,10 +17,10 @@ Trigger support:
 5 files changed, 272 insertions(+)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 8d386766d1ec..3cc41fea6d41 100644
+index f92b7d7d5780..c833b7e44d8b 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -5685,6 +5685,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
+@@ -5691,6 +5691,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
 	.gpio_ops = &mv88e6352_gpio_ops,
 	.avb_ops = &mv88e6390_avb_ops,
 	.ptp_ops = &mv88e6352_ptp_ops,
@@ -1,7 +1,7 @@
-From c587f8b5fa584efc53e09f110bfbd9e09f0deff5 Mon Sep 17 00:00:00 2001
+From c4eb35a6767bd6652c8c947da1f069cba2c6ed16 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 28 May 2024 10:38:42 +0200
-Subject: [PATCH 07/35] net: dsa: tag_dsa: Use tag priority as initial
+Subject: [PATCH 07/27] net: dsa: tag_dsa: Use tag priority as initial
 skb->priority
 Organization: Wires

@@ -1,7 +1,7 @@
-From a0797da07ca347ed3a8092124fef77963a52cdcb Mon Sep 17 00:00:00 2001
+From 7be2376fd4e698d5b123c36d67c45119b6c4860f Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 16 Jan 2024 16:00:55 +0100
-Subject: [PATCH 08/35] net: dsa: Support MDB memberships whose L2 addresses
+Subject: [PATCH 08/27] net: dsa: Support MDB memberships whose L2 addresses
 overlap
 Organization: Wires

@@ -1,7 +1,7 @@
-From e548e14cc271efa568a39afcb8f71bd5a48cf446 Mon Sep 17 00:00:00 2001
+From 69b036e535b1ee6f62ee965d6ffbd559be954a3e Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Thu, 21 Mar 2024 19:12:15 +0100
-Subject: [PATCH 09/35] net: dsa: Support EtherType based priority overrides
+Subject: [PATCH 09/27] net: dsa: Support EtherType based priority overrides
 Organization: Wires

 ---
@@ -1,7 +1,7 @@
-From 63e47b33b09221310e2f6f33478a1b07c4706f00 Mon Sep 17 00:00:00 2001
+From 6935453500d2083106b9809487d5a6e97fdd39e7 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Fri, 22 Mar 2024 16:15:43 +0100
-Subject: [PATCH 10/35] net: dsa: mv88e6xxx: Support EtherType based priority
+Subject: [PATCH 10/27] net: dsa: mv88e6xxx: Support EtherType based priority
 overrides
 Organization: Wires

@@ -15,7 +15,7 @@ Organization: Wires
 6 files changed, 207 insertions(+), 4 deletions(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 3cc41fea6d41..182d3a0e75c8 100644
+index c833b7e44d8b..c48369663425 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -1715,6 +1715,11 @@ static int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip)
@@ -38,7 +38,7 @@ index 3cc41fea6d41..182d3a0e75c8 100644
 
 	err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,
 				       SPEED_UNFORCED, DUPLEX_UNFORCED,
-@@ -6592,6 +6598,7 @@ static struct mv88e6xxx_chip *mv88e6xxx_alloc_chip(struct device *dev)
+@@ -6599,6 +6605,7 @@ static struct mv88e6xxx_chip *mv88e6xxx_alloc_chip(struct device *dev)
 	chip->dev = dev;
 
 	mutex_init(&chip->reg_lock);
@@ -46,7 +46,7 @@ index 3cc41fea6d41..182d3a0e75c8 100644
 	INIT_LIST_HEAD(&chip->mdios);
 	idr_init(&chip->policies);
 	INIT_LIST_HEAD(&chip->msts);
-@@ -7131,6 +7138,61 @@ static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index,
+@@ -7138,6 +7145,61 @@ static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index,
 	return err_sync ? : err_pvt;
 }
 
@@ -108,7 +108,7 @@ index 3cc41fea6d41..182d3a0e75c8 100644
 static const struct phylink_mac_ops mv88e6xxx_phylink_mac_ops = {
 	.mac_select_pcs		= mv88e6xxx_mac_select_pcs,
 	.mac_prepare		= mv88e6xxx_mac_prepare,
-@@ -7200,6 +7262,8 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
+@@ -7207,6 +7269,8 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
 	.crosschip_lag_change	= mv88e6xxx_crosschip_lag_change,
 	.crosschip_lag_join	= mv88e6xxx_crosschip_lag_join,
 	.crosschip_lag_leave	= mv88e6xxx_crosschip_lag_leave,
@@ -1,7 +1,7 @@
-From d6d9d65123b6559194254079b39654883f984f13 Mon Sep 17 00:00:00 2001
+From e1068697ab45bbf67412c0a1aa07769c2a077efc Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 28 May 2024 11:04:22 +0200
-Subject: [PATCH 11/35] net: dsa: mv88e6xxx: Add mqprio qdisc support
+Subject: [PATCH 11/27] net: dsa: mv88e6xxx: Add mqprio qdisc support
 Organization: Wires

 Add support for attaching mqprio qdisc's to mv88e6xxx ports and use
@@ -30,7 +30,7 @@ handle the mapping down to the "real" number.
 2 files changed, 73 insertions(+), 1 deletion(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 182d3a0e75c8..e73a4c2f0392 100644
+index c48369663425..050a89c1b7e1 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -31,6 +31,7 @@
@@ -41,7 +41,7 @@ index 182d3a0e75c8..e73a4c2f0392 100644
 
 #include "chip.h"
 #include "devlink.h"
-@@ -7193,6 +7194,68 @@ static int mv88e6xxx_port_del_etype_prio(struct dsa_switch *ds, int port,
+@@ -7200,6 +7201,68 @@ static int mv88e6xxx_port_del_etype_prio(struct dsa_switch *ds, int port,
 	return err;
 }
 
@@ -110,7 +110,7 @@ index 182d3a0e75c8..e73a4c2f0392 100644
 static const struct phylink_mac_ops mv88e6xxx_phylink_mac_ops = {
 	.mac_select_pcs		= mv88e6xxx_mac_select_pcs,
 	.mac_prepare		= mv88e6xxx_mac_prepare,
-@@ -7264,6 +7327,7 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
+@@ -7271,6 +7334,7 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
 	.crosschip_lag_leave	= mv88e6xxx_crosschip_lag_leave,
 	.port_add_etype_prio	= mv88e6xxx_port_add_etype_prio,
 	.port_del_etype_prio	= mv88e6xxx_port_del_etype_prio,
@@ -118,7 +118,7 @@ index 182d3a0e75c8..e73a4c2f0392 100644
 };
 
 static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)
-@@ -7290,6 +7354,12 @@ static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)
+@@ -7297,6 +7361,12 @@ static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)
 	 */
 	ds->num_lag_ids = mv88e6xxx_has_lag(chip) ? 16 : 0;
 
@@ -1,7 +1,7 @@
-From 0873cb85051b8c483d11570cb2b3ad3da6b7ca4c Mon Sep 17 00:00:00 2001
+From 47de3a790395796d7717bfc81b3c6bc6ffb683b5 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 29 May 2024 13:20:41 +0200
-Subject: [PATCH 12/35] net: dsa: mv88e6xxx: Use VLAN prio over IP when both
+Subject: [PATCH 12/27] net: dsa: mv88e6xxx: Use VLAN prio over IP when both
 are available
 Organization: Wires

@@ -27,7 +27,7 @@ main reasons for choosing the new default:
 1 file changed, 8 insertions(+), 3 deletions(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index e73a4c2f0392..9988fc3983d1 100644
+index 050a89c1b7e1..1888ddd9bfa4 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3443,9 +3443,13 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
@@ -1,7 +1,7 @@
-From 6976a38c8392241021a7bc5053a1f4c4d6447956 Mon Sep 17 00:00:00 2001
+From 75fa8486867714f1c12fd3d9bf40b8201adecdae Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 26 Nov 2024 19:45:59 +0100
-Subject: [PATCH 13/35] [FIX] net: dsa: mv88e6xxx: Trap locally terminated
+Subject: [PATCH 13/27] [FIX] net: dsa: mv88e6xxx: Trap locally terminated
 VLANs
 Organization: Wires

@@ -31,7 +31,7 @@ cause all packets assigned to these VLANs to properly terminated.
 3 files changed, 27 insertions(+), 14 deletions(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 9988fc3983d1..74fca098b11a 100644
+index 1888ddd9bfa4..70eefc1b2140 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -2665,7 +2665,7 @@ static int mv88e6xxx_port_broadcast_sync(struct mv88e6xxx_chip *chip, int port,
@@ -1,7 +1,7 @@
-From 8eb1da2d6b87c0b997a1a9de6d0b964ff8a3134e Mon Sep 17 00:00:00 2001
+From a0639986c74ca3cd4e57f2f5d50639c83c595115 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 19 Sep 2023 18:38:10 +0200
-Subject: [PATCH 14/35] net: phy: marvell10g: Support firmware loading on
+Subject: [PATCH 14/27] net: phy: marvell10g: Support firmware loading on
 88X3310
 Organization: Wires

@@ -1,7 +1,7 @@
-From c33528ebee1cd9f876b41a85f5435d6b37f1b511 Mon Sep 17 00:00:00 2001
+From 968b1126891d9e18da8f82fa54d43aaebf519bfb Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 21 Nov 2023 20:15:24 +0100
-Subject: [PATCH 15/35] net: phy: marvell10g: Fix power-up when strapped to
+Subject: [PATCH 15/27] net: phy: marvell10g: Fix power-up when strapped to
 start powered down
 Organization: Wires

@@ -1,7 +1,7 @@
-From b825b8b6490df0893c6172971db4a4ec45164ee9 Mon Sep 17 00:00:00 2001
+From 44175ca9f0b20e7ad959054c51d6c685cb9f9586 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 15 Nov 2023 20:58:42 +0100
-Subject: [PATCH 16/35] net: phy: marvell10g: Add LED support for 88X3310
+Subject: [PATCH 16/27] net: phy: marvell10g: Add LED support for 88X3310
 Organization: Wires

 Pickup the LEDs from the state in which the hardware reset or
@@ -1,7 +1,7 @@
-From a9248de91e771540c92774998111166732eba59a Mon Sep 17 00:00:00 2001
+From aa25b267d951e8052f4bc314e48ea427f2429891 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Tue, 12 Dec 2023 09:51:05 +0100
-Subject: [PATCH 17/35] net: phy: marvell10g: Support LEDs tied to a single
+Subject: [PATCH 17/27] net: phy: marvell10g: Support LEDs tied to a single
 media side
 Organization: Wires

@@ -1,7 +1,7 @@
-From 9ca2c21e070baa0b3c7aca376f6bb9aaa0c801ea Mon Sep 17 00:00:00 2001
+From e551a59c1848d1e1731fc80727a0d145f22787b0 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 27 Mar 2024 10:10:19 +0100
-Subject: [PATCH 18/35] net: phy: Do not resume PHY when attaching
+Subject: [PATCH 18/27] net: phy: Do not resume PHY when attaching
 Organization: Wires

 The PHY should not start negotiating with its link-partner until
@@ -1,7 +1,7 @@
-From 4a731f968cb458ea29e9fa0b710b87607d01c18b Mon Sep 17 00:00:00 2001
+From f7974affbd2493316b47be12e1b375f531ccbeb1 Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Mon, 4 Mar 2024 16:47:28 +0100
-Subject: [PATCH 19/35] net: bridge: avoid classifying unknown multicast as
+Subject: [PATCH 19/27] net: bridge: avoid classifying unknown multicast as
 mrouters_only
 Organization: Wires

@@ -1,7 +1,7 @@
-From e2cfbf7c107e5ab73bd16d1ffecd30bdcb8c8a63 Mon Sep 17 00:00:00 2001
+From 95d58304a71fd93d6096db629abce24bf84ea510 Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Tue, 5 Mar 2024 06:44:41 +0100
-Subject: [PATCH 20/35] net: bridge: Ignore router ports when forwarding L2
+Subject: [PATCH 20/27] net: bridge: Ignore router ports when forwarding L2
 multicast
 Organization: Wires

@@ -1,7 +1,7 @@
-From 1f19092b74eaaef88314e97e9b89012328bd857d Mon Sep 17 00:00:00 2001
+From 044c9d6d96738f24849180f06d0a3d19861fbb73 Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Thu, 4 Apr 2024 16:36:30 +0200
-Subject: [PATCH 21/35] net: bridge: drop delay for applying strict multicast
+Subject: [PATCH 21/27] net: bridge: drop delay for applying strict multicast
 filtering
 Organization: Wires

@@ -1,7 +1,7 @@
-From 63019c809c938f5233386d39cf53543ed2144850 Mon Sep 17 00:00:00 2001
+From f3f893da3380e7faf14b068c4490236d7102e52f Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Thu, 16 May 2024 14:51:54 +0200
-Subject: [PATCH 22/35] net: bridge: Differentiate MDB additions from
+Subject: [PATCH 22/27] net: bridge: Differentiate MDB additions from
 modifications
 Organization: Wires

@@ -1,7 +1,7 @@
-From 2673b004d9a30833428a799245e3c57fd9acb330 Mon Sep 17 00:00:00 2001
+From fd9bccb249ef2768b567a5ae658f1d5f2083888e Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Fri, 24 Nov 2023 23:29:55 +0100
-Subject: [PATCH 23/35] nvmem: layouts: onie-tlv: Let device probe even when
+Subject: [PATCH 23/27] nvmem: layouts: onie-tlv: Let device probe even when
 TLV is invalid
 Organization: Wires

@@ -1,7 +1,7 @@
-From d7519317b32dcd332a359d42a447b2c74eeacd01 Mon Sep 17 00:00:00 2001
+From b9729c330f866285cb96131d0aa28f3f70f2629b Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Mon, 29 Apr 2024 15:14:51 +0200
-Subject: [PATCH 24/35] usb: core: adjust log level for unauthorized devices
+Subject: [PATCH 24/27] usb: core: adjust log level for unauthorized devices
 Organization: Wires

 The fact that a USB device currently is not authorized is not an error,
@@ -1,7 +1,7 @@
-From 67dfe75bf1517162845725e0fac83dafa37c701d Mon Sep 17 00:00:00 2001
+From 7ba5eea475b969ec5c1827a76b7dc714b551f6ad Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Thu, 16 Jan 2025 12:35:12 +0100
-Subject: [PATCH 25/35] net: dsa: mv88e6xxx: collapse disabled state into
+Subject: [PATCH 25/27] net: dsa: mv88e6xxx: collapse disabled state into
 blocking
 Organization: Wires

@@ -1,7 +1,7 @@
-From 2b29bd6a4b0851dfe2beff03e4c8a59a9d6c201b Mon Sep 17 00:00:00 2001
+From a661d6d7d362ded9ec2730fcb3b8fb508841ea84 Mon Sep 17 00:00:00 2001
 From: Tobias Waldekranz <tobias@waldekranz.com>
 Date: Wed, 12 Feb 2025 22:03:14 +0100
-Subject: [PATCH 26/35] net: dsa: mv88e6xxx: Only activate LAG offloading when
+Subject: [PATCH 26/27] net: dsa: mv88e6xxx: Only activate LAG offloading when
 bridged
 Organization: Wires

@@ -51,7 +51,7 @@ CPU; egress traffic always relies on software hashing.
 1 file changed, 20 insertions(+), 22 deletions(-)

 diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
-index 74fca098b11a..df7ea44da912 100644
+index 70eefc1b2140..e0db6333e418 100644
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3106,6 +3106,7 @@ static int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
@@ -91,7 +91,7 @@ index 74fca098b11a..df7ea44da912 100644
 	err = mv88e6xxx_port_commit_pvid(chip, port);
 	if (err)
 		dev_err(ds->dev,
-@@ -7059,30 +7075,13 @@ static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,
+@@ -7066,30 +7082,13 @@ static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,
 				   struct netlink_ext_ack *extack)
 {
 	struct mv88e6xxx_chip *chip = ds->priv;
@@ -123,7 +123,7 @@ index 74fca098b11a..df7ea44da912 100644
 	mv88e6xxx_reg_unlock(chip);
 	return err;
 }
-@@ -7091,13 +7090,12 @@ static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,
+@@ -7098,13 +7097,12 @@ static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,
 				    struct dsa_lag lag)
 {
 	struct mv88e6xxx_chip *chip = ds->priv;
@@ -1,7 +1,7 @@
-From b459641eb229d46a2dabcc29f060c7eaed27fb32 Mon Sep 17 00:00:00 2001
+From 47be565408de02e2ab973d0b05bf88826d2e3510 Mon Sep 17 00:00:00 2001
 From: Joachim Wiberg <troglobit@gmail.com>
 Date: Sun, 11 Aug 2024 11:27:35 +0200
-Subject: [PATCH 27/35] net: usb: r8152: add r8153b support for link/activity
+Subject: [PATCH 27/27] net: usb: r8152: add r8153b support for link/activity
 LEDs
 Organization: Wires

@@ -1,2 +1,2 @@
 # Calculated with ../utils/kernel-refresh.sh
-sha256   c8af780f6f613ca24622116e4c512a764335ab66e75c6643003c16e49a8e3b90  linux-6.12.25.tar.xz
+sha256   402de222c7425893c38102ddd53d2b602c74c2eabcf6631bb0791089c05e3bca  linux-6.12.26.tar.xz