Merge pull request #1475 from kernelkit/kernel-upgrade-dfbe850e-9e05-4f30-b9b5-bd9399c6b718

Upgrade to kernel 6.18.23
This commit is contained in:
Joachim Wiberg
2026-04-18 15:22:29 +02:00
committed by GitHub
56 changed files with 285 additions and 102 deletions
+1 -1
View File
@@ -27,7 +27,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/aarch64/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -27,7 +27,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/aarch64/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -28,7 +28,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/arm/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -28,7 +28,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/arm/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -26,7 +26,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="board/qemu/x86_64/post-build.sh ${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/x86_64/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -26,7 +26,7 @@ BR2_ROOTFS_OVERLAY="${BR2_EXTERNAL_INFIX_PATH}/board/common/rootfs ${BR2_EXTERNA
BR2_ROOTFS_POST_BUILD_SCRIPT="board/qemu/x86_64/post-build.sh ${BR2_EXTERNAL_INFIX_PATH}/board/common/post-build.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.22"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.18.23"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="${BR2_EXTERNAL_INFIX_PATH}/board/x86_64/linux_defconfig"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
+1 -1
View File
@@ -8,7 +8,7 @@ All notable changes to the project are documented in this file.
### Changes
- Upgrade Linux kernel to 6.18.22 (LTS)
- Upgrade Linux kernel to 6.18.23 (LTS)
- Add support for [Banana Pi BPI-R4][BPI-R4], quad-core Cortex-A73 router with
4x 2.5 GbE switching, dual 10 GbE SFP+. Variants BPI-R4-2g5 and BPI-R4P have
one SFP+ replaced by a 2.5 GbE RJ45, with optional PoE on the R4P
@@ -1,7 +1,7 @@
From e9bd1bc3cafef4c1f0cb11ed8638eed50794d31a Mon Sep 17 00:00:00 2001
From 1468d842d2266521b56a2f41b82de6a6de973b9b Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 19 Sep 2023 18:38:10 +0200
Subject: [PATCH 01/47] net: phy: marvell10g: Support firmware loading on
Subject: [PATCH 01/48] net: phy: marvell10g: Support firmware loading on
88X3310
When probing, if a device is waiting for firmware to be loaded into
@@ -1,7 +1,7 @@
From a438252db8621e406e2e3bfd82c4349820315bdf Mon Sep 17 00:00:00 2001
From ee5e5f2240b08fed5e8c3c49ffe257123c3def3f Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 21 Nov 2023 20:15:24 +0100
Subject: [PATCH 02/47] net: phy: marvell10g: Fix power-up when strapped to
Subject: [PATCH 02/48] net: phy: marvell10g: Fix power-up when strapped to
start powered down
On devices which are hardware strapped to start powered down (PDSTATE
@@ -1,7 +1,7 @@
From d0b9c6e92f1a037f380437cef703a6015c63826a Mon Sep 17 00:00:00 2001
From fcb3a86d1c629b19927184668f437ea26c0a9f46 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 15 Nov 2023 20:58:42 +0100
Subject: [PATCH 03/47] net: phy: marvell10g: Add LED support for 88X3310
Subject: [PATCH 03/48] net: phy: marvell10g: Add LED support for 88X3310
Pickup the LEDs from the state in which the hardware reset or
bootloader left them, but also support further configuration via
@@ -1,7 +1,7 @@
From 47c894a8311a88d6fd1169e8b4631bbb26dd5bbe Mon Sep 17 00:00:00 2001
From b199bb9579235f870393e531ac24958fc682440b Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 12 Dec 2023 09:51:05 +0100
Subject: [PATCH 04/47] net: phy: marvell10g: Support LEDs tied to a single
Subject: [PATCH 04/48] net: phy: marvell10g: Support LEDs tied to a single
media side
In a combo-port setup, i.e. where both the copper and fiber interface
@@ -1,7 +1,7 @@
From 31c4621b74153c7bd34b4f2bac34e55fb6edf6c3 Mon Sep 17 00:00:00 2001
From a3bde794b2ad4d82bde6f23bf79568ebd4f46f40 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 27 Mar 2024 10:10:19 +0100
Subject: [PATCH 05/47] net: phy: Do not resume PHY when attaching
Subject: [PATCH 05/48] net: phy: Do not resume PHY when attaching
The PHY should not start negotiating with its link-partner until
explicitly instructed to do so.
@@ -1,7 +1,7 @@
From f2dd7e7ad65122a04f2b7112f323985ea86497e1 Mon Sep 17 00:00:00 2001
From 3d701444fff9a5668190b048fc89ac843a336e06 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Mon, 4 Mar 2024 16:47:28 +0100
Subject: [PATCH 06/47] net: bridge: avoid classifying unknown multicast as
Subject: [PATCH 06/48] net: bridge: avoid classifying unknown multicast as
mrouters_only
Unknown multicast, MAC/IPv4/IPv6, should always be flooded according to
@@ -1,7 +1,7 @@
From 4ba1828608aa40cd030c754db94288ec7adff1e6 Mon Sep 17 00:00:00 2001
From 43b52a83b40e3ca047ea6d88a72c715711d6c217 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Tue, 5 Mar 2024 06:44:41 +0100
Subject: [PATCH 07/47] net: bridge: Ignore router ports when forwarding L2
Subject: [PATCH 07/48] net: bridge: Ignore router ports when forwarding L2
multicast
Multicast router ports are either statically configured or learned from
@@ -1,7 +1,7 @@
From 1f0b4879fcd6cdde6759b8727940023bb9280768 Mon Sep 17 00:00:00 2001
From a1543093e940725a71b2212de4f1226fae4f4ec1 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Thu, 4 Apr 2024 16:36:30 +0200
Subject: [PATCH 08/47] net: bridge: drop delay for applying strict multicast
Subject: [PATCH 08/48] net: bridge: drop delay for applying strict multicast
filtering
This *local* patch drops the initial delay before applying strict multicast
@@ -1,7 +1,7 @@
From 5cf9d6e2ce6e3b9ad031b25fa6af8f36b2738890 Mon Sep 17 00:00:00 2001
From 8ae396b883a1effddefbc1e3fb1cbb610083fa53 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Thu, 16 May 2024 14:51:54 +0200
Subject: [PATCH 09/47] net: bridge: Differentiate MDB additions from
Subject: [PATCH 09/48] net: bridge: Differentiate MDB additions from
modifications
Before this change, the reception of an IGMPv3 report (and analogously
@@ -1,7 +1,7 @@
From f1470c4f8c8fb850e93ccbd1a976516687b0c577 Mon Sep 17 00:00:00 2001
From c567c93a1a482a673b5aee7e3ea646d545b5fa1f Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Fri, 24 Nov 2023 23:29:55 +0100
Subject: [PATCH 10/47] nvmem: layouts: onie-tlv: Let device probe even when
Subject: [PATCH 10/48] nvmem: layouts: onie-tlv: Let device probe even when
TLV is invalid
Before this change, probing an NVMEM device, expected to contain a
@@ -1,7 +1,7 @@
From eb2378276d37344a2d5271abeddcebc0b34f6256 Mon Sep 17 00:00:00 2001
From b1825b77246536a3e6f7f1d6adbe958dd55e3352 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Sun, 11 Aug 2024 11:27:35 +0200
Subject: [PATCH 11/47] net: usb: r8152: add r8153b support for link/activity
Subject: [PATCH 11/48] net: usb: r8152: add r8153b support for link/activity
LEDs
This patch adds support for the link/activity LEDs on the NanoPi R2S
@@ -1,7 +1,7 @@
From a370be1eabe3c6dd9e34e74a8224481489d82811 Mon Sep 17 00:00:00 2001
From 23aa14e65a1339125413a2b4d3a39203f913b90e Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Sun, 10 Aug 2025 18:52:54 +0200
Subject: [PATCH 12/47] arm64: dts: mediatek: mt7986a: rename BPi R3 ports to
Subject: [PATCH 12/48] arm64: dts: mediatek: mt7986a: rename BPi R3 ports to
match case
For ref. see: https://wiki.banana-pi.org/File:Bpi-r3_Metal_case.jpg
@@ -1,7 +1,7 @@
From 5338a451b60eceeffa1be9ef4b5ac3b2991386b9 Mon Sep 17 00:00:00 2001
From 724739c9ace3065950cd0b1fc9e3c6907f410675 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Wed, 20 Aug 2025 21:38:24 +0200
Subject: [PATCH 13/47] drm/panel-simple: Add a timing for the Raspberry Pi 7"
Subject: [PATCH 13/48] drm/panel-simple: Add a timing for the Raspberry Pi 7"
panel
The Raspberry Pi 7" 800x480 panel uses a Toshiba TC358762 DSI
@@ -1,7 +1,7 @@
From d667d09e34c06d33f92e9e0272adb220b48e5a87 Mon Sep 17 00:00:00 2001
From c8ecc94692e555f91e2ed04bca31e993a26db31d Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Thu, 21 Aug 2025 11:20:23 +0200
Subject: [PATCH 14/47] input:touchscreen:edt-ft5x06: Add polled mode
Subject: [PATCH 14/48] input:touchscreen:edt-ft5x06: Add polled mode
Not all hardware has interrupts therefore we need
to poll the touchscreen.
@@ -1,7 +1,7 @@
From 400b8ee866ed8dbc371eb9c39bb5af688bf614e2 Mon Sep 17 00:00:00 2001
From 08419962120d311b7fc1f4d02a247f0d3c123df7 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 12 Mar 2024 10:27:24 +0100
Subject: [PATCH 15/47] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for
Subject: [PATCH 15/48] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for
PPU on 6393X
In a multi-chip setup, delays of up to 750ms are observed before the
@@ -1,7 +1,7 @@
From e94480f3fdf58c1bd358ab4f52cf49d36f863e13 Mon Sep 17 00:00:00 2001
From 9987aa87b5bd9bbe09f9a362dafd401ca17b3552 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 27 Mar 2024 15:52:43 +0100
Subject: [PATCH 16/47] net: dsa: mv88e6xxx: Improve indirect register access
Subject: [PATCH 16/48] net: dsa: mv88e6xxx: Improve indirect register access
perf on 6393
When operating in multi-chip mode, the 6393 family maps a subset of
@@ -1,7 +1,7 @@
From 40153140fc62e5f392ae82b05eea5d0055d24c20 Mon Sep 17 00:00:00 2001
From 613b902e3748499a64ceb3e2bff93c03d016da4b Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Mon, 22 Apr 2024 23:18:01 +0200
Subject: [PATCH 17/47] net: dsa: mv88e6xxx: Honor ports being managed via
Subject: [PATCH 17/48] net: dsa: mv88e6xxx: Honor ports being managed via
in-band-status
Keep all link parameters in their unforced states when the port is
@@ -1,7 +1,7 @@
From 65179be5219f6ed4b7aa69514039a0780b69fd71 Mon Sep 17 00:00:00 2001
From 6acf1d7f53f36d1fc464370f238eed0516424e4a Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 24 Apr 2024 22:41:04 +0200
Subject: [PATCH 18/47] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user
Subject: [PATCH 18/48] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user
ports on 6393X
For packets with a DA in the IEEE reserved L2 group range, originating
@@ -1,7 +1,7 @@
From 5baf37feaeebce010981a299a049a85da048e2bf Mon Sep 17 00:00:00 2001
From facac9df278bb1c01385989edbb6c825fc702c2f Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 28 May 2024 10:38:42 +0200
Subject: [PATCH 19/47] net: dsa: tag_dsa: Use tag priority as initial
Subject: [PATCH 19/48] net: dsa: tag_dsa: Use tag priority as initial
skb->priority
Use the 3-bit priority field from the DSA tag as the initial packet
@@ -1,7 +1,7 @@
From eb86880e1ecf9af3b33c0d300d59ac604e03fb69 Mon Sep 17 00:00:00 2001
From accbce91b21634dca15b08399f67e6e05d73a336 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 16 Jan 2024 16:00:55 +0100
Subject: [PATCH 20/47] net: dsa: Support MDB memberships whose L2 addresses
Subject: [PATCH 20/48] net: dsa: Support MDB memberships whose L2 addresses
overlap
Multiple IP multicast groups (32 for v4, 2^80 for v6) map to the same
@@ -1,7 +1,7 @@
From 5017e8873b9d3116e180e3a57ece3aa8b0a86677 Mon Sep 17 00:00:00 2001
From 185ce36a232fc3bdf15df5ee2463a0935c18a51c Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Thu, 21 Mar 2024 19:12:15 +0100
Subject: [PATCH 21/47] net: dsa: Support EtherType based priority overrides
Subject: [PATCH 21/48] net: dsa: Support EtherType based priority overrides
---
include/net/dsa.h | 4 ++++
@@ -1,7 +1,7 @@
From 8dee19e065a9568c46249cd7c10c23e9437e83aa Mon Sep 17 00:00:00 2001
From 47e291ca3a3535527965c185c62b08cc00779b5e Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Fri, 22 Mar 2024 16:15:43 +0100
Subject: [PATCH 22/47] net: dsa: mv88e6xxx: Support EtherType based priority
Subject: [PATCH 22/48] net: dsa: mv88e6xxx: Support EtherType based priority
overrides
---
@@ -1,7 +1,7 @@
From a98d626f9419e2c6e21f513b7f69a46979f33c81 Mon Sep 17 00:00:00 2001
From 7fd5df027059281a1f468d265c5ef2c9f75896e4 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 28 May 2024 11:04:22 +0200
Subject: [PATCH 23/47] net: dsa: mv88e6xxx: Add mqprio qdisc support
Subject: [PATCH 23/48] net: dsa: mv88e6xxx: Add mqprio qdisc support
Add support for attaching mqprio qdisc's to mv88e6xxx ports and use
the packet's traffic class as the outgoing priority when no PCP bits
@@ -1,7 +1,7 @@
From 4145d69ac6c6f7a2a517b826cfd8dd41358b9b85 Mon Sep 17 00:00:00 2001
From 3e23bbdc8b8939333ea053c3d68433327db63245 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 29 May 2024 13:20:41 +0200
Subject: [PATCH 24/47] net: dsa: mv88e6xxx: Use VLAN prio over IP when both
Subject: [PATCH 24/48] net: dsa: mv88e6xxx: Use VLAN prio over IP when both
are available
Switch the priority sourcing precdence to prefer VLAN PCP over IP
@@ -1,7 +1,7 @@
From a379ba9057d9a2396b8f58d9e23113579a83b383 Mon Sep 17 00:00:00 2001
From eff73803a923089e2c5d29534ba9e48aba2ccc1c Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Tue, 26 Nov 2024 19:45:59 +0100
Subject: [PATCH 25/47] [FIX] net: dsa: mv88e6xxx: Trap locally terminated
Subject: [PATCH 25/48] [FIX] net: dsa: mv88e6xxx: Trap locally terminated
VLANs
Before this change, in a setup like the following, packets assigned to
@@ -1,7 +1,7 @@
From 075242de1f0f768dfc4340fe286d26354ea74f84 Mon Sep 17 00:00:00 2001
From 40fa8586ec139c0bdde517e62d4a1b9825d1b0dd Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Thu, 16 Jan 2025 12:35:12 +0100
Subject: [PATCH 26/47] net: dsa: mv88e6xxx: collapse disabled state into
Subject: [PATCH 26/48] net: dsa: mv88e6xxx: collapse disabled state into
blocking
This patch changes the behavior of switchcore ports wrt. the port state.
@@ -1,7 +1,7 @@
From 41f390aa23512a696dd32a4ca5b9fb18da52d6ca Mon Sep 17 00:00:00 2001
From ea79ab92b86ea634122192888edafd4b310bdeae Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Wed, 12 Feb 2025 22:03:14 +0100
Subject: [PATCH 27/47] net: dsa: mv88e6xxx: Only activate LAG offloading when
Subject: [PATCH 27/48] net: dsa: mv88e6xxx: Only activate LAG offloading when
bridged
The current port isolation scheme for mv88e6xxx is detailed here:
@@ -1,7 +1,7 @@
From c434f15e57c7788e0895b7196a3251685dc550f8 Mon Sep 17 00:00:00 2001
From d1af4a6a34c2e01bac6f8dde2d9cd663fb44a25e Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Wed, 14 Jan 2026 18:22:41 +0100
Subject: [PATCH 28/47] net: dsa: mv88e6xxx: Add LED support for 6393X
Subject: [PATCH 28/48] net: dsa: mv88e6xxx: Add LED support for 6393X
Original commit:
commit 462277b926140ee2d231317e92afb6cabf640268
@@ -1,7 +1,7 @@
From b42e3b5884a87bb7adf437b88b12e9ab00369aa2 Mon Sep 17 00:00:00 2001
From d6ed7f5702d24ed7b226e06eff03fccd15457bd3 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Thu, 15 Jan 2026 22:47:37 +0100
Subject: [PATCH 29/47] wifi: brcmfmac: support deletion and recreation of
Subject: [PATCH 29/48] wifi: brcmfmac: support deletion and recreation of
primary interface
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@@ -1,7 +1,7 @@
From 4729d6d899318450930cc768c904df03ca9b365c Mon Sep 17 00:00:00 2001
From fff7b8b2097f202e5f52e0f03e6f138e8f0ff79a Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Mon, 19 Jan 2026 13:06:53 +0100
Subject: [PATCH 30/47] wifi: brcmfmac: check connection state before querying
Subject: [PATCH 30/48] wifi: brcmfmac: check connection state before querying
station info
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@@ -1,7 +1,7 @@
From 60e1e211b5dd946bd0f829ab6672e60d8674c95d Mon Sep 17 00:00:00 2001
From 0cc7668beb989e4069770b815eab8ab74a375791 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Tue, 20 Jan 2026 20:12:10 +0100
Subject: [PATCH 31/47] wifi: brcmfmac: suppress log spam for
Subject: [PATCH 31/48] wifi: brcmfmac: suppress log spam for
regulatory-restricted channels
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@@ -1,7 +1,7 @@
From afeb52b56fe9b009d13feb7759ff8d449122bc13 Mon Sep 17 00:00:00 2001
From 1f3967b13ffbf5f7b8340e6231a91e03f96e19d6 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Tue, 20 Jan 2026 20:18:45 +0100
Subject: [PATCH 32/47] wifi: brcmfmac: reduce log noise during AP to station
Subject: [PATCH 32/48] wifi: brcmfmac: reduce log noise during AP to station
transition
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@@ -1,7 +1,7 @@
From 1966cd2804cf32c49d909731495e4d045413a805 Mon Sep 17 00:00:00 2001
From 878560ad9f12cc903c0314ebfcaa2ea3f62891c0 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Tue, 17 Feb 2026 21:59:59 +0100
Subject: [PATCH 33/47] net: phy: air_en8811h: add OF device table for
Subject: [PATCH 33/48] net: phy: air_en8811h: add OF device table for
auto-loading
mdio_uevent() only emits an OF-style MODALIAS via
@@ -1,7 +1,7 @@
From 1334bb5c92403aa569818dbe4f30a8f6672f4427 Mon Sep 17 00:00:00 2001
From 4765bba7232d1745bc7186194c1d02ed6a09922c Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 20 Sep 2024 12:05:18 +0100
Subject: [PATCH 34/47] drm: vc4: dsi: enable video and then retry failed
Subject: [PATCH 34/48] drm: vc4: dsi: enable video and then retry failed
transfers
The DSI block appears to be able to come up stuck in a condition where
@@ -1,7 +1,7 @@
From 4a7d0f8869547af498a30a54abc9e2effd23464d Mon Sep 17 00:00:00 2001
From 7ba9ad346650acee1d32ddf67858c39f954806e2 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 8 Jun 2022 17:23:47 +0100
Subject: [PATCH 35/47] drm: vc4: dsi: Clocks should be running before reset
Subject: [PATCH 35/48] drm: vc4: dsi: Clocks should be running before reset
The initialisation sequence differs slightly from the documentation
in that the clocks are meant to be running before resets and
@@ -1,7 +1,7 @@
From 5c26594b9eb1b82b631ae9ae180df8598c46f003 Mon Sep 17 00:00:00 2001
From a836035db64851169412f7de3ba082373d9d2771 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Fri, 5 Apr 2024 17:51:55 +0100
Subject: [PATCH 36/47] drm/vc4: Ensure DSI is enabled for FIFO resets
Subject: [PATCH 36/48] drm/vc4: Ensure DSI is enabled for FIFO resets
The block must be enabled for the FIFO resets to be actioned,
so ensure this is the case.
@@ -1,7 +1,7 @@
From 90285e557effd004f507aae7659c9a5fd94bfd7e Mon Sep 17 00:00:00 2001
From 9698831e0ab8fa93299f7edf3e649ffa719d5c8a Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Thu, 26 May 2022 18:56:19 +0100
Subject: [PATCH 37/47] drm: vc4: Reset DSI AFE on disable
Subject: [PATCH 37/48] drm: vc4: Reset DSI AFE on disable
vc4_dsi_bridge_disable wasn't resetting things during shutdown,
so add that in.
@@ -1,7 +1,7 @@
From 7547a9a0fd1fc55456e451b00637a5c59a8291ad Mon Sep 17 00:00:00 2001
From 6f603a98fc05fc062ed1d7638a16a7db63f7cce8 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Wed, 20 Nov 2024 13:58:08 +0000
Subject: [PATCH 38/47] drm: vc4: dsi: Handle the different command FIFO widths
Subject: [PATCH 38/48] drm: vc4: dsi: Handle the different command FIFO widths
DSI0 and DSI1 have different widths for the command FIFO (24bit
vs 32bit), but the driver was assuming the 32bit width of DSI1
@@ -1,7 +1,7 @@
From 2ce08de6d1c34e5edc632ae3d7989bf532bf9674 Mon Sep 17 00:00:00 2001
From d3a9c9720b24aeafae9f5d8d2a13b171f8a6b6ab Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 9 Jan 2024 17:37:00 +0000
Subject: [PATCH 39/47] drm/bridge: tc358762: Program the DPI mode into the
Subject: [PATCH 39/48] drm/bridge: tc358762: Program the DPI mode into the
chip
The autodetection of resolution/timing by the TC358762 can lead
@@ -1,7 +1,7 @@
From 3ff89dddb0f78beac41660b95bd510c81698c378 Mon Sep 17 00:00:00 2001
From 5eaaddeeda3c8b203361f898cf9c49857d412c20 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Tue, 9 Jan 2024 18:44:49 +0000
Subject: [PATCH 40/47] drm/bridge: tc358762: revert move ops to enable
Subject: [PATCH 40/48] drm/bridge: tc358762: revert move ops to enable
Reverts 8a4b2fc9c91a ("drm/bridge: tc358762: Split register programming from pre-enable to enable")
as we want the config commands sent before video starts.
@@ -1,7 +1,7 @@
From 89f40a8ef48727a91f38673db8f99ae1fa58940b Mon Sep 17 00:00:00 2001
From 8525e592a4c10cd8d8f572a4fd7af7977b842c41 Mon Sep 17 00:00:00 2001
From: Mattias Walström <lazzer@gmail.com>
Date: Sat, 4 Apr 2026 18:04:19 +0200
Subject: [PATCH 41/47] drm/bridge: tc358762: Set pre_enabled on pre_enable to
Subject: [PATCH 41/48] drm/bridge: tc358762: Set pre_enabled on pre_enable to
prevent regulator imbalance
MIME-Version: 1.0
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@@ -1,7 +1,7 @@
From 8238dba566d274afd0d2a644ba9019c51da043dc Mon Sep 17 00:00:00 2001
From 4e31559fb1abc25a5dce27c90c457b79c5ab0972 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Sun, 5 Apr 2026 11:33:00 +0200
Subject: [PATCH 42/47] net/pcs: add standalone PCS registration infrastructure
Subject: [PATCH 42/48] net/pcs: add standalone PCS registration infrastructure
Add a simple registration mechanism that allows platform PCS drivers to
register their phylink_pcs instances, and consumers (e.g. Ethernet MAC
@@ -1,7 +1,7 @@
From b4b1e9dcd961292fdfc5107093a9bd0bbbb1aeee Mon Sep 17 00:00:00 2001
From 795ec9c490270ac19046c5d405bab0be67209516 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Mon, 6 Apr 2026 14:14:23 +0200
Subject: [PATCH 43/47] net/pcs: add MediaTek MT7988 USXGMII PCS driver
Subject: [PATCH 43/48] net/pcs: add MediaTek MT7988 USXGMII PCS driver
Add a PCS driver for the USXGMII subsystem found in the MediaTek MT7988
SoC (usxgmiisys0 at 0x10080000, usxgmiisys1 at 0x10081000). The hardware
@@ -1,7 +1,7 @@
From 0d5d470aa3a459225c1c0475a2405c53ebff628f Mon Sep 17 00:00:00 2001
From 988a22510b6c8c228c6ef041691df3f9c77d815b Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Mon, 6 Apr 2026 14:15:43 +0200
Subject: [PATCH 44/47] net: ethernet: mediatek: add USXGMII support for MT7988
Subject: [PATCH 44/48] net: ethernet: mediatek: add USXGMII support for MT7988
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@@ -1,7 +1,7 @@
From 480f415f877f7c736b90629f6107f932bda02fff Mon Sep 17 00:00:00 2001
From dcb209816ef3b3e5bcd36946084316add60222c5 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Mon, 6 Apr 2026 14:15:56 +0200
Subject: [PATCH 45/47] arm64: dts: mediatek: mt7988a: add USXGMII PCS nodes
Subject: [PATCH 45/48] arm64: dts: mediatek: mt7988a: add USXGMII PCS nodes
Add device nodes for the two USXGMII subsystem blocks (usxgmiisys0 at
0x10080000 and usxgmiisys1 at 0x10081000), each referencing its clock,
@@ -1,7 +1,7 @@
From cb3a12311b3501234f0ac9663cce375e8a3d2335 Mon Sep 17 00:00:00 2001
From 0e1336b993fbbfd7d52fae719d0eadb51ef46c05 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Mon, 6 Apr 2026 14:16:11 +0200
Subject: [PATCH 46/47] arm64: dts: mediatek: bananapi-bpi-r4: enable SFP+
Subject: [PATCH 46/48] arm64: dts: mediatek: bananapi-bpi-r4: enable SFP+
ports and WPS button
Enable the SFP+ cages wired to gmac1 and gmac2. The USXGMII PCS nodes
@@ -1,7 +1,7 @@
From bb0fa3a64e5752f2939c8faa62fa5fd546352b94 Mon Sep 17 00:00:00 2001
From 04354564238b4426abe2fa699bd6f8547895afcb Mon Sep 17 00:00:00 2001
From: Joachim Wiberg <troglobit@gmail.com>
Date: Tue, 7 Apr 2026 07:34:52 +0200
Subject: [PATCH 47/47] net: phy: sfp: add OEM SFP-10G-T-I quirk
Subject: [PATCH 47/48] net: phy: sfp: add OEM SFP-10G-T-I quirk
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
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@@ -0,0 +1,183 @@
From 02a338410a13dc3cdb2174ea53dd7cb01a34aecf Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz <tobias@waldekranz.com>
Date: Fri, 17 Apr 2026 09:13:04 +0000
Subject: [PATCH 48/48] net: dsa: mv88e6xxx: Trap PTP frames on timestamping
ports, on 6393X
Similar to the Peridot (6390), the designation of PTP frames as
management (and the destination port) must be explicitly
configured. In contrast to the Peridot, the configuration is now done
on a per-port basis, rather than a chip-global setting.
Therefore, make sure to classify PTP frames as management, and route
them towards the CPU port whenever hardware timestamping is enabled on
a port.
---
drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
drivers/net/dsa/mv88e6xxx/hwtstamp.c | 26 ++++++++++++++++++++++++++
drivers/net/dsa/mv88e6xxx/hwtstamp.h | 2 ++
drivers/net/dsa/mv88e6xxx/port.c | 10 ++++++++++
drivers/net/dsa/mv88e6xxx/port.h | 4 ++++
drivers/net/dsa/mv88e6xxx/ptp.c | 23 +++++++++++++++++++++++
drivers/net/dsa/mv88e6xxx/ptp.h | 1 +
7 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 7bc3169839d3..1d1edf84b224 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -5689,7 +5689,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
/* TODO: serdes stats */
.gpio_ops = &mv88e6352_gpio_ops,
.avb_ops = &mv88e6390_avb_ops,
- .ptp_ops = &mv88e6352_ptp_ops,
+ .ptp_ops = &mv88e6393x_ptp_ops,
.phylink_get_caps = mv88e6393x_phylink_get_caps,
.pcs_ops = &mv88e6393x_pcs_ops,
};
diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.c b/drivers/net/dsa/mv88e6xxx/hwtstamp.c
index 6e6472a3b75a..446e1c616752 100644
--- a/drivers/net/dsa/mv88e6xxx/hwtstamp.c
+++ b/drivers/net/dsa/mv88e6xxx/hwtstamp.c
@@ -13,6 +13,7 @@
#include "chip.h"
#include "global2.h"
#include "hwtstamp.h"
+#include "port.h"
#include "ptp.h"
#include <linux/ptp_classify.h>
@@ -533,6 +534,31 @@ int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port)
MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH);
}
+int mv88e6393x_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port)
+{
+ int upstream = MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_DISABLED;
+ int err;
+
+
+ err = mv88e6352_hwtstamp_port_disable(chip, port);
+ if (err)
+ return err;
+
+ return mv88e6393x_port_set_ptp_port(chip, port, upstream);
+}
+
+int mv88e6393x_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port)
+{
+ int upstream = dsa_upstream_port(chip->ds, port);
+ int err;
+
+ err = mv88e6393x_port_set_ptp_port(chip, port, upstream);
+ if (err)
+ return err;
+
+ return mv88e6352_hwtstamp_port_enable(chip, port);
+}
+
static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip *chip, int port)
{
const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.h b/drivers/net/dsa/mv88e6xxx/hwtstamp.h
index c359821d5a6e..c51cd1ab2978 100644
--- a/drivers/net/dsa/mv88e6xxx/hwtstamp.h
+++ b/drivers/net/dsa/mv88e6xxx/hwtstamp.h
@@ -129,6 +129,8 @@ int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip);
void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip);
int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port);
int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port);
+int mv88e6393x_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port);
+int mv88e6393x_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port);
int mv88e6165_global_enable(struct mv88e6xxx_chip *chip);
int mv88e6165_global_disable(struct mv88e6xxx_chip *chip);
diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c
index 1985b8553611..843972077576 100644
--- a/drivers/net/dsa/mv88e6xxx/port.c
+++ b/drivers/net/dsa/mv88e6xxx/port.c
@@ -1484,6 +1484,16 @@ int mv88e6393x_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
return mv88e6393x_port_policy_write(chip, port, ptr, data);
}
+int mv88e6393x_port_set_ptp_port(struct mv88e6xxx_chip *chip, int port,
+ int upstream_port)
+{
+ u16 ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_PTP_DEST;
+ u8 data = MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_MGMTPRI |
+ upstream_port;
+
+ return mv88e6393x_port_policy_write(chip, port, ptr, data);
+}
+
int mv88e6393x_port_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)
{
u16 ptr;
diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h
index f4a56671fc4c..5f733f84b348 100644
--- a/drivers/net/dsa/mv88e6xxx/port.h
+++ b/drivers/net/dsa/mv88e6xxx/port.h
@@ -283,6 +283,8 @@
#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_INGRESS_DEST 0x3000
#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_CPU_DEST 0x3800
#define MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_MGMTPRI 0x00e0
+#define MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_DISABLED 0x001f
+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_PTP_DEST 0x3f00
/* Offset 0x0F: Port Special Ether Type */
#define MV88E6XXX_PORT_ETH_TYPE 0x0f
@@ -577,6 +579,8 @@ int mv88e6393x_set_egress_port(struct mv88e6xxx_chip *chip,
int port);
int mv88e6393x_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
int upstream_port);
+int mv88e6393x_port_set_ptp_port(struct mv88e6xxx_chip *chip, int port,
+ int upstream_port);
int mv88e6393x_port_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
bool message_port);
diff --git a/drivers/net/dsa/mv88e6xxx/ptp.c b/drivers/net/dsa/mv88e6xxx/ptp.c
index f7603573d3a9..327a9f786437 100644
--- a/drivers/net/dsa/mv88e6xxx/ptp.c
+++ b/drivers/net/dsa/mv88e6xxx/ptp.c
@@ -444,6 +444,29 @@ const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {
(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),
};
+const struct mv88e6xxx_ptp_ops mv88e6393x_ptp_ops = {
+ .clock_read = mv88e6352_ptp_clock_read,
+ .ptp_enable = mv88e6352_ptp_enable,
+ .ptp_verify = mv88e6352_ptp_verify,
+ .event_work = mv88e6352_tai_event_work,
+ .port_enable = mv88e6393x_hwtstamp_port_enable,
+ .port_disable = mv88e6393x_hwtstamp_port_disable,
+ .n_ext_ts = 1,
+ .arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,
+ .arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,
+ .dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,
+ .rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
+ (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),
+};
+
static u64 mv88e6xxx_ptp_clock_read(struct cyclecounter *cc)
{
struct mv88e6xxx_chip *chip = cc_to_chip(cc);
diff --git a/drivers/net/dsa/mv88e6xxx/ptp.h b/drivers/net/dsa/mv88e6xxx/ptp.h
index 95bdddb0bf39..54dce1fbf1aa 100644
--- a/drivers/net/dsa/mv88e6xxx/ptp.h
+++ b/drivers/net/dsa/mv88e6xxx/ptp.h
@@ -75,6 +75,7 @@ void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);
extern const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops;
extern const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops;
extern const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops;
+extern const struct mv88e6xxx_ptp_ops mv88e6393x_ptp_ops;
#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */
+1 -1
View File
@@ -1,2 +1,2 @@
# Calculated with utils/kernel-refresh.sh
sha256 a23c92faf3657385c2c6b5f4edd8f81b808907ebe603fa30699eae224da55f59 linux-6.18.22.tar.xz
sha256 2a2d8e76bfcd135ab861bb9795211574eeff6d4ede9cc920f7c137587e835134 linux-6.18.23.tar.xz