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45 lines
1.6 KiB
Diff
45 lines
1.6 KiB
Diff
From 48bb808a5c8d7d0d7c49e4453f4809a9fdeefddc Mon Sep 17 00:00:00 2001
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From: Tobias Waldekranz <tobias@waldekranz.com>
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Date: Tue, 21 Nov 2023 20:15:24 +0100
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Subject: [PATCH 02/50] net: phy: marvell10g: Fix power-up when strapped to
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start powered down
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On devices which are hardware strapped to start powered down (PDSTATE
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== 1), make sure that we clear the power-down bit on all units
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affected by this setting.
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---
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drivers/net/phy/marvell10g.c | 18 +++++++++++++++---
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1 file changed, 15 insertions(+), 3 deletions(-)
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diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
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index 44294519231e..40439db49601 100644
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--- a/drivers/net/phy/marvell10g.c
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+++ b/drivers/net/phy/marvell10g.c
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@@ -322,11 +322,23 @@ static int mv3310_power_down(struct phy_device *phydev)
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static int mv3310_power_up(struct phy_device *phydev)
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{
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+ static const u16 resets[][2] = {
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+ { MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_CTRL1 },
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+ { MDIO_MMD_PCS, MV_PCS_BASE_T + MDIO_CTRL1 },
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+ { MDIO_MMD_PMAPMD, MDIO_CTRL1 },
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+ };
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struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
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- int ret;
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+ int i, ret;
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+
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+ for (i = 0; i < ARRAY_SIZE(resets); i++) {
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+ ret = phy_clear_bits_mmd(phydev, resets[i][0], resets[i][1],
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+ MDIO_CTRL1_LPOWER);
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+ if (ret)
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+ break;
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+ }
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- ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
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- MV_V2_PORT_CTRL_PWRDOWN);
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+ ret = ret ? : phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
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+ MV_V2_PORT_CTRL_PWRDOWN);
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/* Sometimes, the power down bit doesn't clear immediately, and
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* a read of this register causes the bit not to clear. Delay
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