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52 lines
1.8 KiB
Diff
52 lines
1.8 KiB
Diff
From 6d58cd7377a7361cd2584e790dd69e6f2cfbcae1 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 26 May 2022 18:56:19 +0100
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Subject: [PATCH 37/50] drm: vc4: Reset DSI AFE on disable
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vc4_dsi_bridge_disable wasn't resetting things during shutdown,
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so add that in.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_dsi.c | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
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index de963edefb76..9756821ebf27 100644
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--- a/drivers/gpu/drm/vc4/vc4_dsi.c
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+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -360,6 +360,16 @@
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# define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0)
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# define DSI_PHY_AFEC0_CTATADJ_SHIFT 0
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+# define DSI0_AFEC0_PD_ALL_LANES (DSI0_PHY_AFEC0_PD | \
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+ DSI0_PHY_AFEC0_PD_BG | \
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+ DSI0_PHY_AFEC0_PD_DLANE1)
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+
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+# define DSI1_AFEC0_PD_ALL_LANES (DSI1_PHY_AFEC0_PD | \
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+ DSI1_PHY_AFEC0_PD_BG | \
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+ DSI1_PHY_AFEC0_PD_DLANE3 | \
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+ DSI1_PHY_AFEC0_PD_DLANE2 | \
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+ DSI1_PHY_AFEC0_PD_DLANE1)
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+
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#define DSI0_PHY_AFEC1 0x68
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# define DSI0_PHY_AFEC1_IDR_DLANE1_MASK VC4_MASK(10, 8)
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# define DSI0_PHY_AFEC1_IDR_DLANE1_SHIFT 8
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@@ -809,6 +819,16 @@ static void vc4_dsi_bridge_disable(struct drm_bridge *bridge,
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disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
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disp0_ctrl &= ~DSI_DISP0_ENABLE;
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DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
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+
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+ /* Reset the DSI and all its fifos. */
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+ DSI_PORT_WRITE(CTRL, DSI_CTRL_SOFT_RESET_CFG |
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+ DSI_PORT_BIT(CTRL_RESET_FIFOS));
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+
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+ /* Power down the analogue front end. */
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+ DSI_PORT_WRITE(PHY_AFEC0, DSI_PORT_BIT(PHY_AFEC0_RESET) |
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+ DSI_PORT_BIT(PHY_AFEC0_PD) |
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+ DSI_PORT_BIT(AFEC0_PD_ALL_LANES));
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+
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}
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static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
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