diff --git a/.github/workflows/build-image.yml b/.github/workflows/build-image.yml
index f3409148..d3900e96 100644
--- a/.github/workflows/build-image.yml
+++ b/.github/workflows/build-image.yml
@@ -15,6 +15,7 @@ on:
- bananapi-bpi-r64
- friendlyarm-nanopi-r2s
- microchip-sama7g54-ek
+ - acer-connect-vero-w
default: 'raspberrypi-rpi64'
jobs:
@@ -57,40 +58,53 @@ jobs:
echo "BOOTLOADER=rpi2-boot" >> $GITHUB_ENV
echo "ARCH=arm" >> $GITHUB_ENV
echo "BUILD_EMMC=false" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
raspberrypi-rpi64)
echo "BOOTLOADER=rpi64-boot" >> $GITHUB_ENV
echo "ARCH=aarch64" >> $GITHUB_ENV
echo "BUILD_EMMC=false" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
bananapi-bpi-r3)
echo "BOOTLOADER_SD=bpi-r3-sd-boot" >> $GITHUB_ENV
echo "BOOTLOADER_EMMC=bpi-r3-emmc-boot" >> $GITHUB_ENV
echo "ARCH=aarch64" >> $GITHUB_ENV
echo "BUILD_EMMC=true" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
bananapi-bpi-r4)
echo "BOOTLOADER_SD=bpi-r4-sd-boot" >> $GITHUB_ENV
echo "BOOTLOADER_EMMC=bpi-r4-emmc-boot" >> $GITHUB_ENV
echo "ARCH=aarch64" >> $GITHUB_ENV
echo "BUILD_EMMC=true" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
bananapi-bpi-r64)
echo "BOOTLOADER_SD=bpi-r64-sd-boot" >> $GITHUB_ENV
echo "BOOTLOADER_EMMC=bpi-r64-emmc-boot" >> $GITHUB_ENV
echo "ARCH=aarch64" >> $GITHUB_ENV
echo "BUILD_EMMC=true" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
+ ;;
+ acer-connect-vero-w)
+ echo "BOOTLOADER_EMMC=bpi-r3-emmc-boot" >> $GITHUB_ENV
+ echo "ARCH=aarch64" >> $GITHUB_ENV
+ echo "BUILD_EMMC=true" >> $GITHUB_ENV
+ echo "BUILD_SD=false" >> $GITHUB_ENV
;;
friendlyarm-nanopi-r2s)
echo "BOOTLOADER=nanopi-r2s-boot" >> $GITHUB_ENV
echo "ARCH=aarch64" >> $GITHUB_ENV
echo "BUILD_EMMC=false" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
microchip-sama7g54-ek)
echo "BOOTLOADER_SD=sama7g54-ek-sd-boot" >> $GITHUB_ENV
echo "BOOTLOADER_EMMC=sama7g54-ek-emmc-boot" >> $GITHUB_ENV
echo "ARCH=arm" >> $GITHUB_ENV
echo "BUILD_EMMC=true" >> $GITHUB_ENV
+ echo "BUILD_SD=true" >> $GITHUB_ENV
;;
*)
echo "Error: Unknown board ${{ inputs.board }}"
@@ -111,15 +125,16 @@ jobs:
run: |
# Download bootloader from latest-boot release tag
if [ "$BUILD_EMMC" = "true" ]; then
- # Download both SD and eMMC bootloaders for boards that support both
- echo "Downloading SD bootloader: ${BOOTLOADER_SD}"
- gh release download latest-boot --pattern "*${BOOTLOADER_SD}*" --dir temp_bootloader_sd/
- mkdir -p output_sd/images
- cd temp_bootloader_sd/
- tar -xzf *.tar.gz --strip-components=1 -C ../output_sd/images/
- cd ../
- rm -rf temp_bootloader_sd/
-
+ if [ "$BUILD_SD" = "true" ]; then
+ # Download both SD and eMMC bootloaders for boards that support both
+ echo "Downloading SD bootloader: ${BOOTLOADER_SD}"
+ gh release download latest-boot --pattern "*${BOOTLOADER_SD}*" --dir temp_bootloader_sd/
+ mkdir -p output_sd/images
+ cd temp_bootloader_sd/
+ tar -xzf *.tar.gz --strip-components=1 -C ../output_sd/images/
+ cd ../
+ rm -rf temp_bootloader_sd/
+ fi
echo "Downloading eMMC bootloader: ${BOOTLOADER_EMMC}"
gh release download latest-boot --pattern "*${BOOTLOADER_EMMC}*" --dir temp_bootloader_emmc/
mkdir -p output_emmc/images
@@ -128,8 +143,10 @@ jobs:
cd ../
rm -rf temp_bootloader_emmc/
- echo "SD bootloader files:"
- ls -la output_sd/images/
+ if [ "$BUILD_SD" = "true" ]; then
+ echo "SD bootloader files:"
+ ls -la output_sd/images/
+ fi
echo "eMMC bootloader files:"
ls -la output_emmc/images/
else
@@ -201,22 +218,18 @@ jobs:
fi
- name: Create SD card image
+ if: ${{ env.BUILD_SD == 'true' }}
run: |
if [ "$BUILD_EMMC" = "true" ]; then
export BINARIES_DIR=$PWD/output_sd/images
- export BUILD_DIR=$PWD/build
- export BR2_EXTERNAL_INFIX_PATH=$PWD
- export RELEASE=""
- export INFIX_ID="infix"
- ./utils/mkimage.sh -t sdcard ${{ inputs.board }}
else
export BINARIES_DIR=$PWD/output/images
- export BUILD_DIR=$PWD/build
- export BR2_EXTERNAL_INFIX_PATH=$PWD
- export RELEASE=""
- export INFIX_ID="infix"
- ./utils/mkimage.sh -t sdcard ${{ inputs.board }}
fi
+ export BUILD_DIR=$PWD/build
+ export BR2_EXTERNAL_INFIX_PATH=$PWD
+ export RELEASE=""
+ export INFIX_ID="infix"
+ ./utils/mkimage.sh -t sdcard ${{ inputs.board }}
- name: Create eMMC image
if: ${{ env.BUILD_EMMC == 'true' }}
diff --git a/board/aarch64/Config.in b/board/aarch64/Config.in
index 20acf682..dbba55c0 100644
--- a/board/aarch64/Config.in
+++ b/board/aarch64/Config.in
@@ -1,6 +1,7 @@
if BR2_aarch64
source "$BR2_EXTERNAL_INFIX_PATH/board/aarch64/alder-alder/Config.in"
+source "$BR2_EXTERNAL_INFIX_PATH/board/aarch64/acer-connect-vero-w/Config.in"
source "$BR2_EXTERNAL_INFIX_PATH/board/aarch64/bananapi-bpi-r3/Config.in"
source "$BR2_EXTERNAL_INFIX_PATH/board/aarch64/bananapi-bpi-r4/Config.in"
source "$BR2_EXTERNAL_INFIX_PATH/board/aarch64/bananapi-bpi-r64/Config.in"
diff --git a/board/aarch64/README.md b/board/aarch64/README.md
index bd6cf79e..17afca0e 100644
--- a/board/aarch64/README.md
+++ b/board/aarch64/README.md
@@ -4,6 +4,7 @@ aarch64
Board Specific Documentation
----------------------------
+- [Acer Connect Vero W6m](acer-connect-vero-w/)
- [Banana Pi BPi-R3](bananapi-bpi-r3/)
- [Banana Pi BPi-R4](bananapi-bpi-r4/)
- [Banana Pi BPi-R64](bananapi-bpi-r64/)
diff --git a/board/aarch64/acer-connect-vero-w/Config.in b/board/aarch64/acer-connect-vero-w/Config.in
new file mode 100644
index 00000000..63a6ef4b
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/Config.in
@@ -0,0 +1,6 @@
+config BR2_PACKAGE_ACER_CONNECT_VERO_W6
+ bool "Acer Connect Vero w6"
+ depends on BR2_aarch64
+ select BR2_PACKAGE_BANANAPI_BPI_R3
+ help
+ Build Acer Connect Vero w6
diff --git a/board/aarch64/acer-connect-vero-w/README.md b/board/aarch64/acer-connect-vero-w/README.md
new file mode 100644
index 00000000..1afb3cde
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/README.md
@@ -0,0 +1,131 @@
+# Acer Connect Vero W6m
+
+
+
+## Overview
+
+The Acer Connect Vero W6m is a compact WiFi 6/6E router platform based
+on the MediaTek MT7986A SoC. In Infix it is supported as an eMMC-based
+target that reuses the factory secure boot chain while replacing the
+system partitions with an Infix installation.
+
+The Acer Connect Vero W6m is based on the same MT7986a SoC as the
+BPI-R3, with tri-band WiFi (2.4 GHz + 5 GHz + 6 GHz) using a PCIe
+MT7916 module and the SoC's built-in MT7976 DBDC radio.
+
+## Default WiFi Layout
+
+The factory configuration on this branch enables all three radios in AP
+mode and bridges them into the default LAN bridge `br0`:
+
+- `radio0` / `wifi0-ap`: 2.4 GHz, SSID `Infix`
+- `radio1` / `wifi1-ap`: 6 GHz, SSID `Infix6G`
+- `radio2` / `wifi2-ap`: 5 GHz, SSID `Infix5G`
+
+6 GHz operation is enabled in the MT7915e driver configuration, and all
+three APs use the same default passphrase `infixinfix` from the factory
+configuration.
+
+Secure boot is enabled on this device, so the factory bootloader
+(partitions 1-4: bl2, u-boot-env, factory, fip) must not be modified.
+Infix is installed by replacing partitions 5+ while keeping the
+factory bootloader intact. The stock U-Boot chainloads the Infix
+U-Boot from the first partition after fip.
+
+## Prerequisites
+
+- Serial console access (115200 8N1) — required to interrupt U-Boot.
+ Disassembly is needed to reach the UART header. See the [OpenWrt
+ Vero W6m page][vero-openwrt] for details.
+- TFTP server on the local network with `u-boot.bin` for the initial
+ RAM boot.
+- SSH access from the running Infix system to a host that stores
+ `infix-vero-w-emmc.img`.
+- Ethernet cable connected between the PC and the Vero Internet/WAN
+ port.
+- DHCP server running on the PC, serving addresses on that link during
+ installation.
+- **Save the MAC addresses** from the stock U-Boot environment before
+ installing. Interrupt autoboot and run `printenv` to note down:
+ `2gMAC`, `5gMAC`, `6gMAC`, `LANMAC`, and `WANMAC`.
+
+## Required Files
+
+Prepare these files on a host reachable from the Vero:
+
+1. **Infix Vero image:**
+ - [infix-vero-w-emmc.img][1] (Complete system image)
+2. **eMMC bootloader** (extracted from):
+ - [bpi-r3-emmc-boot-2025.01-latest.tar.gz][2]
+ - Extract `u-boot.bin` from the tarball to your TFTP server
+
+## Installing Infix
+
+Connect the PC directly to the Vero Internet/WAN port before starting
+the installation. The PC should provide DHCP service on that link so
+the stock U-Boot and the temporary Infix system can reach the TFTP/SSH
+host.
+
+1. **RAM-load Infix U-Boot** from the stock U-Boot serial console
+ (hit any key to stop autoboot):
+
+ ```
+ setenv serverip
+ setenv ipaddr
+ setenv bootmenu_default 7
+ tftpboot 0x46000000 u-boot.bin
+ go 0x46000000
+ ```
+
+ `serverip` must point to your TFTP server and `ipaddr` must be a free
+ address for the Vero on the same subnet. `bootmenu_default 7`
+ bypasses secure boot verification. The Infix U-Boot will
+ automatically netboot the Infix system.
+
+2. **From running Infix**, stream the image directly to eMMC:
+
+ ```bash
+ ssh @ "dd if=/path/to/infix-vero-w-emmc.img bs=512 skip=17408 status=none" | \
+ dd of=/dev/mmcblk0 bs=512 seek=17408 conv=fsync
+ sync
+ ```
+
+ This writes only the Infix partitions (starting after fip at sector
+ 17408), leaving the factory bootloader and calibration data intact.
+ Do not interrupt the transfer; if it fails, rerun the command from
+ the beginning.
+
+3. **Update the GPT** to replace stock partitions 5+ with the Infix
+ layout:
+
+ ```bash
+ sudo sgdisk --zap-all /dev/mmcblk0
+ sudo sgdisk -a 1 \
+ -n2:8192:9215 -c2:u-boot-env \
+ -n3:9216:13311 -c3:factory \
+ -n4:13312:17407 -c4:fip \
+ -n5:17408:+32M -c5:infix-uboot \
+ -n6:0:+8M -c6:aux \
+ -n7:0:+250M -c7:primary \
+ -n8:0:+250M -c8:secondary \
+ -n9:0:+128M -c9:cfg \
+ -n10:0:+128M -c10:var \
+ -p /dev/mmcblk0
+ ```
+
+4. **Configure U-Boot to chainload Infix permanently** — reboot and
+ interrupt stock U-Boot again:
+
+ ```
+ setenv bootmenu_default 7
+ setenv bootcmd 'mmc read 0x46000000 0x4400 0x10000; go 0x46000000'
+ saveenv
+ reset
+ ```
+
+ The `bootcmd` reads the Infix U-Boot (at sector 0x4400/17408)
+ into RAM and jumps to it. After `reset`, Infix boots from eMMC.
+
+[vero-openwrt]: https://openwrt.org/toh/acer/predator_vero_w6m
+[1]: https://github.com/kernelkit/infix/releases/download/latest-boot/infix-vero-w-emmc.img
+[2]: https://github.com/kernelkit/infix/releases/download/latest-boot/bpi-r3-emmc-boot-2025.01-latest.tar.gz
diff --git a/board/aarch64/acer-connect-vero-w/acer-connect-vero-w.mk b/board/aarch64/acer-connect-vero-w/acer-connect-vero-w.mk
new file mode 100644
index 00000000..41f6f7fd
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/acer-connect-vero-w.mk
@@ -0,0 +1,2 @@
+$(eval $(ix-board))
+$(eval $(generic-package))
diff --git a/board/aarch64/acer-connect-vero-w/connect_vero_w6m_case.jpg b/board/aarch64/acer-connect-vero-w/connect_vero_w6m_case.jpg
new file mode 100644
index 00000000..30fa4e95
Binary files /dev/null and b/board/aarch64/acer-connect-vero-w/connect_vero_w6m_case.jpg differ
diff --git a/board/aarch64/acer-connect-vero-w/dts/Makefile b/board/aarch64/acer-connect-vero-w/dts/Makefile
new file mode 100644
index 00000000..cac33ae4
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/dts/Makefile
@@ -0,0 +1 @@
+dtb-y += mediatek/mt7986a-acer-connect-vero-w.dtb
diff --git a/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-common.dtsi b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-common.dtsi
new file mode 100644
index 00000000..fc77c7a7
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-common.dtsi
@@ -0,0 +1,425 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include
+#include
+#include
+#include
+
+#include
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ infix {
+ /* Default admin user password: 'admin' */
+ factory-password-hash = "$5$mI/zpOAqZYKLC2WU$i7iPzZiIjOjrBF3NyftS9CCq8dfYwHwrmUK097Jca9A";
+ };
+ };
+
+ memory@40000000 {
+ reg = <0 0x40000000 0 0x20000000>;
+ device_type = "memory";
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ factory {
+ label = "factory";
+ linux,code = ;
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = ;
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&pio {
+ wifi_rst_hog: wifi-reset-hog {
+ gpio-hog;
+ gpios = <6 GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "wifi-reset";
+ };
+
+ mmc0_pins_default: mmc0-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = ;
+ bias-pull-up = ; /* pull-up 10K */
+ };
+
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = ;
+ bias-pull-down = ; /* pull-down 50K */
+ };
+
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = ; /* pull-down 50K */
+ };
+
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = ;
+ bias-pull-up = ; /* pull-up 10K */
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = ;
+ bias-pull-up = ; /* pull-up 10K */
+ };
+
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = ;
+ bias-pull-down = ; /* pull-down 50K */
+ };
+
+ conf-ds {
+ pins = "EMMC_DSL";
+ bias-pull-down = ; /* pull-down 50K */
+ };
+
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = ;
+ bias-pull-up = ; /* pull-up 10K */
+ };
+ };
+
+ pcie_pins: pcie-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie_pereset";
+ };
+ };
+
+ wf_2g_5g_pins: wf_2g_5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = ;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = ;
+ };
+ };
+
+ i2c_pins: i2c-pins {
+ mux {
+ function = "i2c";
+ groups = "i2c";
+ };
+ };
+};
+
+&trng {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c_pins>;
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ bus-width = <0x08>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ hs400-ds-delay = <0x14014>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ non-removable;
+ no-sd;
+ no-sdio;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ card@0 {
+ compatible = "mmc-card";
+ reg = <0>;
+
+ block {
+ compatible = "block-device";
+
+ partitions {
+ block-partition-factory {
+ partname = "factory";
+
+ nvmem: nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom@0 {
+ reg = <0x0 0x1000>;
+ };
+
+ precal_factory_1010: precal@1010 {
+ reg = <0x1010 0x62810>;
+ };
+ };
+ };
+ };
+ };
+ };
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+ num-lanes = <1>;
+ status = "okay";
+
+ slot0: pcie@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ #address-cells = <0x03>;
+ #size-cells = <0x02>;
+
+ pcie_wifi: wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ };
+ };
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie_port {
+ clocks = <&clk40m>, <&topckgen CLK_TOP_PCIE_PHY_SEL>;
+ clock-names = "ref", "da_ref";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio: mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch: switch@1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swport0: port@0 {
+ reg = <0>;
+ phy-handle = <&swphy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&swphy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&swphy2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&swphy3>;
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swphy0: phy@0 {
+ reg = <0>;
+
+ mediatek,led-config = <
+ 0x21 0x8008 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0xc001 /* LED0_ON_CTRL */
+ 0x25 0x0003 /* LED0_BLINK_CTRL */
+ 0x26 0xc006 /* LED1_ON_CTRL */
+ 0x27 0x003c /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy1: phy@1 {
+ reg = <1>;
+
+ mediatek,led-config = <
+ 0x21 0x8008 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0xc001 /* LED0_ON_CTRL */
+ 0x25 0x0003 /* LED0_BLINK_CTRL */
+ 0x26 0xc006 /* LED1_ON_CTRL */
+ 0x27 0x003c /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy2: phy@2 {
+ reg = <2>;
+
+ mediatek,led-config = <
+ 0x21 0x8008 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0xc001 /* LED0_ON_CTRL */
+ 0x25 0x0003 /* LED0_BLINK_CTRL */
+ 0x26 0xc006 /* LED1_ON_CTRL */
+ 0x27 0x003c /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy3: phy@3 {
+ reg = <3>;
+
+ mediatek,led-config = <
+ 0x21 0x8008 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0xc001 /* LED0_ON_CTRL */
+ 0x25 0x0003 /* LED0_BLINK_CTRL */
+ 0x26 0xc006 /* LED1_ON_CTRL */
+ 0x27 0x003c /* LED1_BLINK_CTRL */
+ >;
+ };
+ };
+ };
+ };
+};
+
+&wifi {
+ nvmem-cells = <&eeprom_factory_0>, <&precal_factory_1010>;
+ nvmem-cell-names = "eeprom", "precal";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+ status = "okay";
+};
diff --git a/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-factory-eeprom.dtsi b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-factory-eeprom.dtsi
new file mode 100644
index 00000000..312f5cb6
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-factory-eeprom.dtsi
@@ -0,0 +1,263 @@
+/* Factory EEPROM for MT7976 WMAC (DBDC) - Acer Connect Vero W */
+/* Band 1 patched from 5GHz-only to 5GHz+6GHz selectable */
+
+&wifi {
+ mediatek,eeprom-data = <
+ 0x86790100 0x000c4326 0x60100000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x01000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000800 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x12525353 0x003c003f 0x3a100700 0x15030000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x0000be00 0x00000000
+ 0x0000c100 0x00000000 0x00000000 0xc3000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000009 0x00000000 0x00000000
+ 0x00000000 0x00000303 0x03030303 0x03030303
+ 0x03030303 0x03030303 0x03040303 0x03040303
+ 0x03040303 0x03040000 0x00161b18 0x1b1a1a1a
+ 0x1a0d0008 0x0f0d0209 0x0e0d0209 0x0e0d0209
+ 0x0e0c020a 0x0e0c020a 0x0e0c020a 0x0e0b020b
+ 0x0e2b2b2b 0x2b222222 0x22222222 0x22222222
+ 0x22222222 0x22222222 0x22000000 0x00000000
+ 0x00000000 0x002a2a2a 0x2a282828 0x282a2a2a
+ 0x2a282828 0x282a2a2a 0x2a282828 0x282a2a2a
+ 0x2a282828 0x28000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x007f7f20 0x2530363c 0x41014847 0x4c52575c
+ 0x7f7f7f7f 0x1b222a33 0x3a40014d 0x464c525a
+ 0x5e7f7f7f 0x7f252834 0x3c424a01 0x4a4f555d
+ 0x636e7f7f 0x7f7f202a 0x303b444a 0x014a5158
+ 0x5f666e7f 0x7f7f7f7f 0x8080c5c5 0xd1d1dddd
+ 0xe5e5f3f3 0x40408080 0xcfcfdbdb 0xe3e3efef
+ 0xf7f74040 0x8080bfbf 0xcbcbd9d9 0xe5e5eded
+ 0x40408080 0xb9b9c5c5 0xd3d3dfdf 0xe7e74040
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0xc0a0c0e0 0xfcfcafe0 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x02200220 0x02200220 0x02300230 0x02300230
+ 0x02300230 0x02300230 0x02300230 0x02300230
+ 0x02240224 0x02240224 0x02240224 0x02240224
+ 0x02240224 0x02240224 0x02240224 0x02240224
+ 0x000000c4 0xc4c4c4c4 0x0000c4c4 0xc4c4c1c1
+ 0x008282c3 0xc3000000 0x00838300 0xc4c4c4c1
+ 0xc1008282 0x8383c3c3 0xc2c10000 0x83838484
+ 0xc4c4c4c1 0xc1008282 0x8383c4c4 0xc4c1c100
+ 0x82828383 0xc4c4c4c1 0xc1008282 0x8383c4c4
+ 0xc3c100c4 0x81c4c3c2 0x00818181 0xc4c4c3c2
+ 0x00818282 0x00c4c4c2 0xc2008182 0x8200c4c4
+ 0xc3c20081 0x82828484 0xc4c4c3c2 0x00818282
+ 0x8484c4c4 0xc2c20081 0x82828484 0xc4c4c2c1
+ 0x81828383 0x8585c4c4 0xc3c20081 0x82828484
+ 0xc4c4c3c2 0x00818282 0x8484c4c4 0xc3c20081
+ 0x82828484 0xc6c5c3c1 0x00c5c5c3 0xc2008182
+ 0x828484c5 0xc5c3c200 0x81828284 0x84c4c4c3
+ 0xc2008182 0x828484c4 0xc4c2c181 0x82838385
+ 0x85c5c5c3 0xc2008182 0x828484c5 0xc5c3c200
+ 0x81828284 0x84c5c5c3 0xc2008182 0x82848400
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x378a6e05 0x0ae64a6c 0x00000000 0x50050000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00b40000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x86828786 0x87c8cb8a 0x8380c982 0x00c8ca86
+ 0x8383c583 0x83c1c58c 0x8883c78b 0x8780c28c
+ 0x8485c682 0xc3c4c4c4 0xc5c6c7c8 0xcfcecdcc
+ 0xcccdcec1 0xc1c1c1c2 0xc4c6c7ce 0xcecfcfcf
+ 0xcecec6c7 0xc8c9caca 0xcbcbd2d2 0xd2d2d0ce
+ 0xcc8100c1 0xc3c5c6c7 0xc8d0d0d1 0xd1d1d0cf
+ 0xdeee6be7 0x5fede2eb 0xce08ce09 0xce0ace0a
+ 0x4e0b4f0b 0x4f0c4f0c 0x4f0d4f0d 0x540a540b
+ 0x540c540b 0x540c510a 0x510b510c 0xd10c510d
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0xde0fde10 0xde115e12
+ 0xde12de12 0xde135e14 0x5e0cde0d 0xde0e5e10
+ 0x5e105e10 0x5e11de11 0xde0ede0f 0xde10de11
+ 0x5e12de12 0x5e135e13 0xde0f5e11 0x5e12de13
+ 0x5e13de13 0xde14de14 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00848484 0x84848484 0x84000000 0x00e4d5d4
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ >;
+};
diff --git a/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-pcie-eeprom.dtsi b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-pcie-eeprom.dtsi
new file mode 100644
index 00000000..d51e6b73
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w-pcie-eeprom.dtsi
@@ -0,0 +1,263 @@
+/* Factory EEPROM for PCIe MT7916 radio - Acer Connect Vero W */
+/* Offset 0xa0000 in the "factory" GPT partition on eMMC */
+
+&pcie_wifi {
+ mediatek,eeprom-data = <
+ 0x16790000 0x000c4326 0x60000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x50750000 0x07670700 0x00000400 0x50710000
+ 0x00000000 0x00000400 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0xb101e748 0xf57f5e99
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000800 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x12924848 0x003e003f 0x3a100000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x81a3a380
+ 0xa4910091 0x00910091 0x00910000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x000a0000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x0000c500 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000013 0x12120000 0x00000000
+ 0x00000000 0x00000303 0x03030303 0x03030303
+ 0x03030303 0x03030505 0x05050505 0x05050505
+ 0x05050505 0x05050000 0x001b1919 0x19181818
+ 0x180f0006 0x1c0e080a 0x170e080a 0x170d0809
+ 0x170d020a 0x0e0d020a 0x0e0d020a 0x0e0b020a
+ 0x0e22222c 0x2c2b2b2b 0x2b2b2b2b 0x2b2b2b2b
+ 0x2b2b2b2b 0x2b2b2b2b 0x2b000000 0x00000000
+ 0x00000000 0x001e201e 0x201e2020 0x201e201e
+ 0x20201e20 0x20272929 0x29272727 0x27272929
+ 0x29272727 0x27000000 0x00000000 0x00000000
+ 0x00000000 0x00cdcfcf 0xcfcfcf00 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x007f7f20 0x2530363c 0x41014347 0x4c52575c
+ 0x7f7f0000 0x00000000 0x00000000 0x00000000
+ 0x0000007f 0x7f252834 0x3c424a01 0x4d4f555f
+ 0x636e7f7f 0x7f7f202a 0x303b444a 0x014d5158
+ 0x5f666e7f 0x7f7f7f7f 0x8080c5c5 0xcbcbd9d9
+ 0xe1e1ebeb 0x40408080 0xcfcfdbdb 0xe3e3efef
+ 0xf7f74040 0x8080c1c1 0xcdcdd5d5 0xe1e1eded
+ 0x40408080 0xbbbbc7c7 0xcfcfdbdb 0xe7e74040
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0xb0900000 0x0000c0f0 0xf8000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
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+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x02000200 0x02000200 0x02000200 0x02000200
+ 0x02000200 0x02000200 0x02000200 0x02000200
+ 0x02000200 0x02000200 0x02000200 0x02000200
+ 0x02000200 0x02000200 0x02000200 0x02000200
+ 0x000000c6 0xc6c6c6c4 0x0000c5c5 0xc5c4c1c1
+ 0x818383c3 0xc3c2c100 0x81848400 0xc5c5c4c1
+ 0xc1818383 0x8585c3c3 0xc2c10081 0x84848686
+ 0xc5c5c4c1 0xc1818383 0x8585c5c5 0xc4c1c181
+ 0x83838585 0xc5c5c4c1 0xc1818383 0x8585c6c6
+ 0xc4c300c6 0x00c6c4c3 0xc1008181 0xc6c6c4c3
+ 0xc1008181 0x00c5c5c3 0xc2008182 0x8200c6c6
+ 0xc4c3c100 0x81818686 0xc6c6c4c3 0xc1008181
+ 0x8686c5c5 0xc3c20081 0x82828787 0xc5c5c3c2
+ 0x00818282 0x8787c6c6 0xc4c3c100 0x81818686
+ 0xc6c6c4c3 0xc1008181 0x8686c6c6 0xc4c3c100
+ 0x81818686 0xc6c6c4c3 0x00c6c6c4 0xc3c10081
+ 0x818686c6 0xc6c4c3c1 0x00818186 0x86c5c5c3
+ 0xc2008182 0x828787c5 0xc5c3c281 0x82838388
+ 0x88c6c6c4 0xc3c10081 0x818686c6 0xc6c4c3c1
+ 0x00818186 0x86c6c6c4 0xc3c10081 0x81868600
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
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+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00b70000 0x00b70000 0x00000000 0x00000000
+ 0x01000000 0x0000c400 0xb8008700 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
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+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0xc7c60000 0x89898987 0x87858381 0x898a8b8b
+ 0x8a898785 0x88898988 0x87868584 0x00000000
+ 0x00000000 0xcccfcecd 0xcdcacecd 0xcbcfcece
+ 0xcfcfcfc7 0xcececdce 0xc7cfcec7 0xcfcfcfcf
+ 0xcfcf0000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x7fe2f0e4 0x00000000 0xa4de24df 0xa4e0a4e1
+ 0xa4e1a4de 0x24dfa4e0 0xa4e1a4e1 0xa4dea4df
+ 0xa4e0a4e1 0xa4e1a4de 0xa4df24e0 0xa4e1a4e1
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0xde0fde0f 0xde0fde10
+ 0xde11de11 0x5e12de12 0xde10de10 0xde10de11
+ 0xde12de12 0xde13de13 0x5a085a09 0x5a0a5a0a
+ 0x5a0a5a0a 0x5a0a5a0a 0x5a055a06 0x5a075a08
+ 0x5a085a09 0x5a095a09 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00ded453
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ >;
+};
diff --git a/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w.dts b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w.dts
new file mode 100644
index 00000000..cb8a0758
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/dts/mediatek/mt7986a-acer-connect-vero-w.dts
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include "mt7986a-acer-connect-vero-w-common.dtsi"
+#include "mt7986a-acer-connect-vero-w-pcie-eeprom.dtsi"
+
+/ {
+ model = "Acer Connect Vero W6m";
+ compatible = "acer,connect-vero-w", "mediatek,mt7986a";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_status;
+ led-failsafe = &led_status;
+ led-running = &led_status;
+ led-upgrade = &led_status;
+ };
+};
+
+&i2c0 {
+ led-controller@30 {
+ compatible = "kinetic,ktd2026";
+ reg = <0x30>;
+ vin-supply = <®_5v>;
+ vio-supply = <®_3p3v>;
+
+ led_status: multi-led {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = ;
+ };
+
+ led@1 {
+ reg = <1>;
+ color = ;
+ };
+
+ led@2 {
+ reg = <2>;
+ color = ;
+ };
+ };
+ };
+};
+
+&nvmem {
+ eeprom_factory_a0000: eeprom@a0000 {
+ reg = <0xa0000 0x1000>;
+ };
+
+ precal_factory_a1010: precal@a1010 {
+ reg = <0xa1010 0x62810>;
+ };
+};
+
+&swport0 {
+ label = "internet";
+};
diff --git a/board/aarch64/acer-connect-vero-w/genimage.cfg.in b/board/aarch64/acer-connect-vero-w/genimage.cfg.in
new file mode 100644
index 00000000..bf76088d
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/genimage.cfg.in
@@ -0,0 +1,86 @@
+image cfg.ext4 {
+ empty = true
+ temporary = true
+ size = 128M
+ ext4 {
+ label = "cfg"
+ use-mke2fs = true
+ features = "uninit_bg"
+ extraargs = "-m 0 -i 4096"
+ }
+}
+
+image var.ext4 {
+ empty = true
+ temporary = true
+ size = 128M
+ ext4 {
+ label = "var"
+ use-mke2fs = true
+ features = "uninit_bg"
+ extraargs = "-m 0 -i 4096"
+ }
+}
+
+image #INFIX_ID##VERSION#-vero-w-#TARGET#.img {
+ hdimage {
+ partition-table-type = "gpt"
+ gpt-no-backup = true
+ }
+
+ /*
+ * Factory partitions (1-4) -- secure boot, do not overwrite.
+ * Offsets and sizes match the stock Acer GPT exactly.
+ * No image data is written, preserving factory content.
+ */
+ partition u-boot-env {
+ offset = 8192s
+ size = 1024s
+ }
+
+ partition factory {
+ offset = 9216s
+ size = 4096s
+ }
+
+ partition fip {
+ offset = 13312s
+ size = 4096s
+ }
+
+ /* Infix U-Boot, chainloaded by stock bootloader */
+ partition infix-uboot {
+ offset = 17408s
+ image = "u-boot.bin"
+ size = 32M
+ }
+
+ partition aux {
+ partition-uuid = D4EF35A0-0652-45A1-B3DE-D63339C82035
+ image = "aux.ext4"
+ }
+
+ partition primary {
+ partition-type-uuid = 0FC63DAF-8483-4772-8E79-3D69D8477DE4
+ bootable = true
+ size = 250M
+ image = "rootfs.squashfs"
+ }
+
+ partition secondary {
+ partition-type-uuid = 0FC63DAF-8483-4772-8E79-3D69D8477DE4
+ bootable = true
+ size = 250M
+ image = "rootfs.squashfs"
+ }
+
+ partition cfg {
+ partition-uuid = 7aa497f0-73b5-47e5-b2ab-8752d8a48105
+ image = "cfg.ext4"
+ }
+
+ partition var {
+ partition-uuid = 8046A06A-E45A-4A14-A6AD-6684704A393F
+ image = "var.ext4"
+ }
+}
diff --git a/board/aarch64/acer-connect-vero-w/rootfs/usr/share/product/acer,connect-vero-w/etc/factory-config.cfg b/board/aarch64/acer-connect-vero-w/rootfs/usr/share/product/acer,connect-vero-w/etc/factory-config.cfg
new file mode 100644
index 00000000..f61ee1ac
--- /dev/null
+++ b/board/aarch64/acer-connect-vero-w/rootfs/usr/share/product/acer,connect-vero-w/etc/factory-config.cfg
@@ -0,0 +1,488 @@
+{
+ "ieee802-dot1ab-lldp:lldp": {
+ "infix-lldp:enabled": true
+ },
+ "ietf-hardware:hardware": {
+ "component": [
+ {
+ "name": "USB",
+ "class": "infix-hardware:usb",
+ "state": {
+ "admin-state": "unlocked"
+ }
+ },
+ {
+ "class": "infix-hardware:usb",
+ "name": "USB2",
+ "state": {
+ "admin-state": "unlocked"
+ }
+ },
+ {
+ "name": "radio0",
+ "class": "infix-hardware:wifi",
+ "infix-hardware:wifi-radio": {
+ "country-code": "DE",
+ "band": "2.4GHz",
+ "channel": "auto"
+ }
+ },
+ {
+ "name": "radio1",
+ "class": "infix-hardware:wifi",
+ "infix-hardware:wifi-radio": {
+ "country-code": "DE",
+ "band": "6GHz",
+ "channel": "auto"
+ }
+ },
+ {
+ "name": "radio2",
+ "class": "infix-hardware:wifi",
+ "infix-hardware:wifi-radio": {
+ "country-code": "DE",
+ "band": "5GHz",
+ "channel": "auto"
+ }
+ }
+ ]
+ },
+ "ietf-interfaces:interfaces": {
+ "interface": [
+ {
+ "name": "br0",
+ "type": "infix-if-type:bridge",
+ "ietf-ip:ipv4": {
+ "address": [
+ {
+ "ip": "192.168.0.1",
+ "prefix-length": 24
+ }
+ ]
+ }
+ },
+ {
+ "name": "lan1",
+ "type": "infix-if-type:ethernet",
+ "ietf-ip:ipv6": {},
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ },
+ {
+ "name": "lan2",
+ "type": "infix-if-type:ethernet",
+ "ietf-ip:ipv6": {},
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ },
+ {
+ "name": "lan3",
+ "type": "infix-if-type:ethernet",
+ "ietf-ip:ipv6": {},
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ },
+ {
+ "name": "lo",
+ "type": "infix-if-type:loopback",
+ "ietf-ip:ipv4": {
+ "address": [
+ {
+ "ip": "127.0.0.1",
+ "prefix-length": 8
+ }
+ ]
+ },
+ "ietf-ip:ipv6": {
+ "address": [
+ {
+ "ip": "::1",
+ "prefix-length": 128
+ }
+ ]
+ }
+ },
+ {
+ "name": "internet",
+ "type": "infix-if-type:ethernet",
+ "ietf-ip:ipv4": {
+ "infix-dhcp-client:dhcp": {
+ "option": [
+ {
+ "id": "ntp-server"
+ },
+ {
+ "id": "broadcast"
+ },
+ {
+ "id": "domain"
+ },
+ {
+ "id": "hostname",
+ "value": "auto"
+ },
+ {
+ "id": "dns-server"
+ },
+ {
+ "id": "router"
+ },
+ {
+ "id": "netmask"
+ },
+ {
+ "id": "vendor-class",
+ "value": "Acer Connect Vero W"
+ }
+ ]
+ }
+ },
+ "ietf-ip:ipv6": {
+ "infix-dhcpv6-client:dhcp": {
+ "option": [
+ {
+ "id": "ntp-server"
+ },
+ {
+ "id": "client-fqdn"
+ },
+ {
+ "id": "domain-search"
+ },
+ {
+ "id": "dns-server"
+ }
+ ]
+ }
+ }
+ },
+ {
+ "name": "wifi0-ap",
+ "type": "infix-if-type:wifi",
+ "infix-interfaces:wifi": {
+ "radio": "radio0",
+ "access-point": {
+ "ssid": "Infix",
+ "security": {
+ "secret": "wifi"
+ }
+ }
+ },
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ },
+ {
+ "name": "wifi1-ap",
+ "type": "infix-if-type:wifi",
+ "infix-interfaces:wifi": {
+ "radio": "radio1",
+ "access-point": {
+ "ssid": "Infix6G",
+ "security": {
+ "secret": "wifi"
+ }
+ }
+ },
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ },
+ {
+ "name": "wifi2-ap",
+ "type": "infix-if-type:wifi",
+ "infix-interfaces:wifi": {
+ "radio": "radio2",
+ "access-point": {
+ "ssid": "Infix5G",
+ "security": {
+ "secret": "wifi"
+ }
+ }
+ },
+ "infix-interfaces:bridge-port": {
+ "bridge": "br0"
+ }
+ }
+
+ ]
+ },
+ "ietf-keystore:keystore": {
+ "asymmetric-keys": {
+ "asymmetric-key": [
+ {
+ "name": "genkey",
+ "public-key-format": "infix-crypto-types:ssh-public-key-format",
+ "public-key": "",
+ "private-key-format": "infix-crypto-types:rsa-private-key-format",
+ "cleartext-private-key": "",
+ "certificates": {}
+ }
+ ]
+ },
+ "symmetric-keys": {
+ "symmetric-key": [
+ {
+ "name": "wifi",
+ "cleartext-symmetric-key": "aW5maXhpbmZpeA==",
+ "key-format": "infix-crypto-types:passphrase-key-format"
+ }
+ ]
+ }
+ },
+ "ietf-netconf-acm:nacm": {
+ "enable-nacm": true,
+ "read-default": "permit",
+ "write-default": "permit",
+ "exec-default": "permit",
+ "groups": {
+ "group": [
+ {
+ "name": "admin",
+ "user-name": [
+ "admin"
+ ]
+ },
+ {
+ "name": "operator",
+ "user-name": []
+ },
+ {
+ "name": "guest",
+ "user-name": []
+ }
+ ]
+ },
+ "rule-list": [
+ {
+ "name": "admin-acl",
+ "group": [
+ "admin"
+ ],
+ "rule": [
+ {
+ "name": "permit-all",
+ "module-name": "*",
+ "access-operations": "*",
+ "action": "permit",
+ "comment": "Allow 'admin' group complete access to all operations and data."
+ }
+ ]
+ },
+ {
+ "name": "operator-acl",
+ "group": [
+ "operator"
+ ],
+ "rule": [
+ {
+ "name": "permit-system-rpcs",
+ "module-name": "ietf-system",
+ "rpc-name": "*",
+ "access-operations": "exec",
+ "action": "permit",
+ "comment": "Operators can reboot, shutdown, and set system time."
+ }
+ ]
+ },
+ {
+ "name": "guest-acl",
+ "group": [
+ "guest"
+ ],
+ "rule": [
+ {
+ "name": "deny-all-write+exec",
+ "module-name": "*",
+ "access-operations": "create update delete exec",
+ "action": "deny",
+ "comment": "Guests cannot change anything or exec rpcs."
+ }
+ ]
+ },
+ {
+ "name": "default-deny-all",
+ "group": [
+ "*"
+ ],
+ "rule": [
+ {
+ "name": "deny-password-access",
+ "path": "/ietf-system:system/authentication/user/password",
+ "access-operations": "*",
+ "action": "deny",
+ "comment": "No user except admins can access password hashes."
+ },
+ {
+ "name": "deny-keystore-access",
+ "module-name": "ietf-keystore",
+ "access-operations": "*",
+ "action": "deny",
+ "comment": "No user except admins can access cryptographic keys."
+ },
+ {
+ "name": "deny-truststore-access",
+ "module-name": "ietf-truststore",
+ "access-operations": "*",
+ "action": "deny",
+ "comment": "No user except admins can access trust store."
+ }
+ ]
+ }
+ ]
+ },
+ "ietf-netconf-server:netconf-server": {
+ "listen": {
+ "endpoints": {
+ "endpoint": [
+ {
+ "name": "default-ssh",
+ "ssh": {
+ "tcp-server-parameters": {
+ "local-bind": [
+ {
+ "local-address": "::"
+ }
+ ]
+ },
+ "ssh-server-parameters": {
+ "server-identity": {
+ "host-key": [
+ {
+ "name": "default-key",
+ "public-key": {
+ "central-keystore-reference": "genkey"
+ }
+ }
+ ]
+ }
+ }
+ }
+ }
+ ]
+ }
+ }
+ },
+ "ietf-system:system": {
+ "hostname": "acer-connect-%m",
+ "ntp": {
+ "server": [
+ {
+ "name": "default",
+ "udp": {
+ "address": "pool.ntp.org"
+ }
+ }
+ ]
+ },
+ "authentication": {
+ "user": [
+ {
+ "name": "admin",
+ "password": "$factory$",
+ "infix-system:shell": "bash"
+ }
+ ]
+ },
+ "infix-system:motd-banner": "Li0tLS0tLS0uCnwgIC4gLiAgfCBJbmZpeCBPUyDigJQgSW1tdXRhYmxlLkZyaWVuZGx5LlNlY3VyZQp8LS4gdiAuLXwgaHR0cHM6Ly9rZXJuZWxraXQub3JnCictJy0tLSctJwo="
+ },
+ "infix-dhcp-server:dhcp-server": {
+ "option": [
+ {
+ "id": "ntp-server",
+ "address": "auto"
+ },
+ {
+ "id": "dns-server",
+ "address": "auto"
+ },
+ {
+ "id": "router",
+ "address": "auto"
+ }
+ ],
+ "subnet": [
+ {
+ "subnet": "192.168.0.0/24",
+ "pool": {
+ "start-address": "192.168.0.100",
+ "end-address": "192.168.0.250"
+ }
+ }
+ ]
+ },
+ "infix-firewall:firewall": {
+ "default": "wan",
+ "zone": [
+ {
+ "name": "lan",
+ "action": "accept",
+ "interface": [
+ "br0"
+ ]
+ },
+ {
+ "name": "wan",
+ "action": "drop",
+ "interface": [
+ "internet"
+ ],
+ "service": [
+ "dhcpv6-client"
+ ]
+ }
+ ],
+ "policy": [
+ {
+ "name": "lan-to-wan",
+ "action": "accept",
+ "ingress": [
+ "lan"
+ ],
+ "egress": [
+ "wan"
+ ],
+ "masquerade": true
+ }
+ ]
+ },
+ "infix-meta:meta": {
+ "version": "1.7"
+ },
+ "infix-services:mdns": {
+ "enabled": true
+ },
+ "infix-services:ssh": {
+ "enabled": true,
+ "hostkey": [
+ "genkey"
+ ],
+ "listen": [
+ {
+ "name": "ipv4",
+ "address": "0.0.0.0",
+ "port": 22
+ },
+ {
+ "name": "ipv6",
+ "address": "::",
+ "port": 22
+ }
+ ]
+ },
+ "infix-services:web": {
+ "enabled": true,
+ "console": {
+ "enabled": true
+ },
+ "netbrowse": {
+ "enabled": true
+ },
+ "restconf": {
+ "enabled": true
+ }
+ }
+}
diff --git a/board/aarch64/bananapi-bpi-r3/Config.in b/board/aarch64/bananapi-bpi-r3/Config.in
index 4801e6ef..14513037 100644
--- a/board/aarch64/bananapi-bpi-r3/Config.in
+++ b/board/aarch64/bananapi-bpi-r3/Config.in
@@ -6,6 +6,7 @@ config BR2_PACKAGE_BANANAPI_BPI_R3
select BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK
select BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7986
select BR2_PACKAGE_LINUX_FIRMWARE_AIROHA_EN8811H
+ select BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7916
select SDCARD_AUX
help
Build Banana PI R3 support
diff --git a/board/aarch64/bananapi-bpi-r3/README.md b/board/aarch64/bananapi-bpi-r3/README.md
index fd39dcf3..91a1aaf4 100644
--- a/board/aarch64/bananapi-bpi-r3/README.md
+++ b/board/aarch64/bananapi-bpi-r3/README.md
@@ -212,6 +212,7 @@ sync
2. Set boot switches to eMMC mode (see image above)
3. Power on
+
## Troubleshooting
### Board won't boot
diff --git a/board/aarch64/bananapi-bpi-r3/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtsi b/board/aarch64/bananapi-bpi-r3/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtsi
index c92d1163..027c9d2e 100644
--- a/board/aarch64/bananapi-bpi-r3/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtsi
+++ b/board/aarch64/bananapi-bpi-r3/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtsi
@@ -19,4 +19,34 @@ possible to use dtbo in sysboot unless present in syslinux.conf
no-sd;
no-sdio;
status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ card@0 {
+ compatible = "mmc-card";
+ reg = <0>;
+
+ partitions {
+ compatible = "gpt-partitions";
+
+ partition-factory {
+ partname = "factory";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_wmac: eeprom@0 {
+ reg = <0x0 0x1000>;
+ };
+
+ eeprom_factory_pcie: eeprom@a0000 {
+ reg = <0xa0000 0x1000>;
+ };
+ };
+ };
+ };
+ };
};
diff --git a/board/aarch64/bananapi-bpi-r3/uboot/extras.config b/board/aarch64/bananapi-bpi-r3/uboot/extras.config
index 364c6c92..571567ae 100644
--- a/board/aarch64/bananapi-bpi-r3/uboot/extras.config
+++ b/board/aarch64/bananapi-bpi-r3/uboot/extras.config
@@ -4,7 +4,7 @@ CONFIG_BOOTDELAY=2
CONFIG_ENV_IS_NOWHERE=y
# CONFIG_ENV_IS_IN_MMC is not set
CONFIG_MULTI_DTB_FIT=y
-CONFIG_OF_LIST="mt7986a-bpi-r3-sd mt7986a-bpi-r3-emmc mt7986a-bpi-r3-mini"
+CONFIG_OF_LIST="mt7986a-bpi-r3-sd mt7986a-bpi-r3-emmc mt7986a-bpi-r3-mini mt7986a-acer-connect-vero-w"
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/board/aarch64/rootfs/etc/modprobe.d/mt7915e.conf b/board/aarch64/rootfs/etc/modprobe.d/mt7915e.conf
new file mode 100644
index 00000000..07d8317d
--- /dev/null
+++ b/board/aarch64/rootfs/etc/modprobe.d/mt7915e.conf
@@ -0,0 +1 @@
+options mt7915e enable_6ghz=1
diff --git a/configs/aarch64_defconfig b/configs/aarch64_defconfig
index fb970c94..62ca07f0 100644
--- a/configs/aarch64_defconfig
+++ b/configs/aarch64_defconfig
@@ -134,6 +134,7 @@ BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y
BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SIGNATURE_SUPPORT=y
BR2_PACKAGE_HOST_UBOOT_TOOLS_FDT_ADD_PUBKEY=y
BR2_PACKAGE_ALDER_ALDER=y
+BR2_PACKAGE_ACER_CONNECT_VERO_W6=y
BR2_PACKAGE_BANANAPI_BPI_R3=y
BR2_PACKAGE_BANANAPI_BPI_R4=y
BR2_PACKAGE_BANANAPI_BPI_R64=y
diff --git a/patches/uboot/2025.01/0001-hush-Remove-Ctrl-C-detection-in-loops.patch b/patches/uboot/2025.01/0001-hush-Remove-Ctrl-C-detection-in-loops.patch
index 5d4dca02..fa7b13e3 100644
--- a/patches/uboot/2025.01/0001-hush-Remove-Ctrl-C-detection-in-loops.patch
+++ b/patches/uboot/2025.01/0001-hush-Remove-Ctrl-C-detection-in-loops.patch
@@ -1,7 +1,10 @@
From 9a9885324c70d607c9c79814441dbc829e212e41 Mon Sep 17 00:00:00 2001
From: Tobias Waldekranz
Date: Mon, 10 Jun 2024 13:25:31 +0200
-Subject: [PATCH 1/9] hush: Remove Ctrl-C detection in loops
+Subject: [PATCH 01/10] hush: Remove Ctrl-C detection in loops
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
Assume that the original intent was to emulate SIGINT to a shell. This
@@ -14,7 +17,7 @@ Disable this behavior and delegate the problem of loop termination to
the writer of the script instead.
Signed-off-by: Tobias Waldekranz
-Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
common/cli_hush.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/patches/uboot/2025.01/0002-cmd-new-command-rpidisplay.patch b/patches/uboot/2025.01/0002-cmd-new-command-rpidisplay.patch
index 52becdcd..9c111f4d 100644
--- a/patches/uboot/2025.01/0002-cmd-new-command-rpidisplay.patch
+++ b/patches/uboot/2025.01/0002-cmd-new-command-rpidisplay.patch
@@ -1,14 +1,13 @@
From 7efc3aa61fbc84b2c0c959e737257d2de2e8020c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mattias=20Walstr=C3=B6m?=
Date: Sat, 6 Sep 2025 22:18:27 +0200
-Subject: [PATCH 2/9] cmd: new command rpidisplay
+Subject: [PATCH 02/10] cmd: new command rpidisplay
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Organization: Wires
Signed-off-by: Mattias Walström
-Signed-off-by: Joachim Wiberg
---
cmd/Kconfig | 14 ++++++++
cmd/Makefile | 2 +-
diff --git a/patches/uboot/2025.01/0003-arm-dts-at91-sama7g5ek-increase-clock-for-sdmmc-from.patch b/patches/uboot/2025.01/0003-arm-dts-at91-sama7g5ek-increase-clock-for-sdmmc-from.patch
index a8f183fd..968b0b1d 100644
--- a/patches/uboot/2025.01/0003-arm-dts-at91-sama7g5ek-increase-clock-for-sdmmc-from.patch
+++ b/patches/uboot/2025.01/0003-arm-dts-at91-sama7g5ek-increase-clock-for-sdmmc-from.patch
@@ -1,8 +1,11 @@
From c646eef3ee304ae49ad7e3f998ed08bfa0efb7b9 Mon Sep 17 00:00:00 2001
From: Mihai Sain
Date: Fri, 5 May 2023 13:28:31 +0300
-Subject: [PATCH 3/9] arm: dts: at91: sama7g5ek: increase clock for sdmmc from
- 25 MHz to 50 MHz
+Subject: [PATCH 03/10] arm: dts: at91: sama7g5ek: increase clock for sdmmc
+ from 25 MHz to 50 MHz
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
Current clock for sdmmc0 and sdmmc1 is 25 MHz because of the caps forced
@@ -13,7 +16,7 @@ improve the boot time when reading the kernel binary. Tested on
sama7g5ek rev 5 using mmcinfo command.
Signed-off-by: Mihai Sain
-Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/dts/at91-sama7g5ek.dts | 4 ----
1 file changed, 4 deletions(-)
diff --git a/patches/uboot/2025.01/0004-arm-dts-at91-sama7g5ek-supports-high-speed-on-mmc0-e.patch b/patches/uboot/2025.01/0004-arm-dts-at91-sama7g5ek-supports-high-speed-on-mmc0-e.patch
index 9299166b..d65c1fc0 100644
--- a/patches/uboot/2025.01/0004-arm-dts-at91-sama7g5ek-supports-high-speed-on-mmc0-e.patch
+++ b/patches/uboot/2025.01/0004-arm-dts-at91-sama7g5ek-supports-high-speed-on-mmc0-e.patch
@@ -1,8 +1,11 @@
From 5a530e4eebf64887fd6b449dd45df04eccd07cad Mon Sep 17 00:00:00 2001
From: Joachim Wiberg
Date: Thu, 12 Feb 2026 10:00:02 +0100
-Subject: [PATCH 4/9] arm: dts: at91: sama7g5ek supports high-speed on mmc0
+Subject: [PATCH 04/10] arm: dts: at91: sama7g5ek supports high-speed on mmc0
(eMMC)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
- eMMC high-speed timing is supported
@@ -11,6 +14,7 @@ Organization: Wires
Tested on sama7g5ek rev 5.
Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/dts/at91-sama7g5ek.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/patches/uboot/2025.01/0005-net-phy-Add-the-Airoha-EN8811H-PHY-driver.patch b/patches/uboot/2025.01/0005-net-phy-Add-the-Airoha-EN8811H-PHY-driver.patch
index 4261bcff..4530e2c8 100644
--- a/patches/uboot/2025.01/0005-net-phy-Add-the-Airoha-EN8811H-PHY-driver.patch
+++ b/patches/uboot/2025.01/0005-net-phy-Add-the-Airoha-EN8811H-PHY-driver.patch
@@ -1,7 +1,10 @@
From be250151366460ee318ca47bb15ec23e5e322a84 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mattias=20Walstr=C3=B6m?=
Date: Wed, 18 Feb 2026 17:00:09 +0100
-Subject: [PATCH 5/9] net: phy: Add the Airoha EN8811H PHY driver
+Subject: [PATCH 05/10] net: phy: Add the Airoha EN8811H PHY driver
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
@@ -23,7 +26,7 @@ I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.
Signed-off-by: Lucien.Jheng
-Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
drivers/net/phy/Kconfig | 25 +
drivers/net/phy/Makefile | 1 +
diff --git a/patches/uboot/2025.01/0006-Add-bpi-r3-mini-device-tree.patch b/patches/uboot/2025.01/0006-Add-bpi-r3-mini-device-tree.patch
index 229e2200..977dae37 100644
--- a/patches/uboot/2025.01/0006-Add-bpi-r3-mini-device-tree.patch
+++ b/patches/uboot/2025.01/0006-Add-bpi-r3-mini-device-tree.patch
@@ -1,10 +1,13 @@
From a987f92a768291669eec1a8c5d413190bd9241ec Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mattias=20Walstr=C3=B6m?=
Date: Wed, 18 Feb 2026 17:00:42 +0100
-Subject: [PATCH 6/9] Add bpi-r3-mini device tree
+Subject: [PATCH 06/10] Add bpi-r3-mini device tree
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
-Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/mt7986a-bpi-r3-mini.dts | 238 +++++++++++++++++++++++++++
diff --git a/patches/uboot/2025.01/0007-bpi-r3-r4-Add-probe-for-specific-model.patch b/patches/uboot/2025.01/0007-bpi-r3-r4-Add-probe-for-specific-model.patch
index 1868e06c..d8206d7d 100644
--- a/patches/uboot/2025.01/0007-bpi-r3-r4-Add-probe-for-specific-model.patch
+++ b/patches/uboot/2025.01/0007-bpi-r3-r4-Add-probe-for-specific-model.patch
@@ -1,7 +1,10 @@
From 57b3cd8612a8da852f0796d97e6a7526cc4742cc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mattias=20Walstr=C3=B6m?=
Date: Wed, 18 Feb 2026 17:02:23 +0100
-Subject: [PATCH 7/9] bpi-r3/r4: Add probe for specific model
+Subject: [PATCH 07/10] bpi-r3/r4: Add probe for specific model
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
Probe for bpi-r3 and bpi-r3-mini and select correct device tree,
@@ -9,7 +12,7 @@ prepare for bpi-r4 (not supported yet, but soon), for bpi-r3,
look if there are phys connected, if so it is a mini, else it is
regular bpi-r3.
-Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/mach-mediatek/Kconfig | 3 +
board/mediatek/mt7986/Kconfig | 10 ++
diff --git a/patches/uboot/2025.01/0008-arm-mediatek-fix-MT7622-BROM-image-header-type.patch b/patches/uboot/2025.01/0008-arm-mediatek-fix-MT7622-BROM-image-header-type.patch
index f3eb471e..6e07c538 100644
--- a/patches/uboot/2025.01/0008-arm-mediatek-fix-MT7622-BROM-image-header-type.patch
+++ b/patches/uboot/2025.01/0008-arm-mediatek-fix-MT7622-BROM-image-header-type.patch
@@ -1,7 +1,10 @@
From c07b984f00e48294cb6e14825919405d53532271 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg
Date: Thu, 26 Feb 2026 11:22:28 +0100
-Subject: [PATCH 8/9] arm: mediatek: fix MT7622 BROM image header type
+Subject: [PATCH 08/10] arm: mediatek: fix MT7622 BROM image header type
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
The LK image header for MT7622 was inadvertently changed to "media=nor"
@@ -11,6 +14,7 @@ mkimage generates the correct header for the BROM to accept.
Reported-by: Shiji Yang
Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/mach-mediatek/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/patches/uboot/2025.01/0009-arm-mediatek-add-BananaPi-BPI-R64-MT7622-defconfigs.patch b/patches/uboot/2025.01/0009-arm-mediatek-add-BananaPi-BPI-R64-MT7622-defconfigs.patch
index d832763f..a15595fd 100644
--- a/patches/uboot/2025.01/0009-arm-mediatek-add-BananaPi-BPI-R64-MT7622-defconfigs.patch
+++ b/patches/uboot/2025.01/0009-arm-mediatek-add-BananaPi-BPI-R64-MT7622-defconfigs.patch
@@ -1,7 +1,10 @@
From d89bb394f5d5f2cf8b15e5694d168f937b9ac426 Mon Sep 17 00:00:00 2001
From: Joachim Wiberg
Date: Thu, 26 Feb 2026 11:23:28 +0100
-Subject: [PATCH 9/9] arm: mediatek: add BananaPi BPI-R64 (MT7622) defconfigs
+Subject: [PATCH 09/10] arm: mediatek: add BananaPi BPI-R64 (MT7622) defconfigs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
Organization: Wires
Add U-Boot support for the BananaPi BPI-R64 router board, based on the
@@ -36,6 +39,7 @@ Sources:
https://github.com/frank-w/u-boot/commit/c451ad3950e63d54b074f71e930459281dd3f594
Signed-off-by: Joachim Wiberg
+Signed-off-by: Mattias Walström
---
arch/arm/dts/mt7622-bananapi-bpi-r64-nand.dts | 290 ++++++++++++++++++
arch/arm/dts/mt7622-bananapi-bpi-r64.dts | 38 ++-
diff --git a/patches/uboot/2025.01/0010-mt7986-bpi-r3-Enable-Acer-Connect-Vero-W.patch b/patches/uboot/2025.01/0010-mt7986-bpi-r3-Enable-Acer-Connect-Vero-W.patch
new file mode 100644
index 00000000..10761e96
--- /dev/null
+++ b/patches/uboot/2025.01/0010-mt7986-bpi-r3-Enable-Acer-Connect-Vero-W.patch
@@ -0,0 +1,205 @@
+From 2e5f34ed626021e3307dcf5a005d9466eecdacd1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Mattias=20Walstr=C3=B6m?=
+Date: Sun, 10 May 2026 21:42:27 +0200
+Subject: [PATCH 10/10] mt7986: bpi-r3: Enable Acer Connect Vero W
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+Organization: Wires
+
+Signed-off-by: Mattias Walström
+---
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/mt7986a-acer-connect-vero-w.dts | 13 ++++
+ board/mediatek/mt7986/bpir3.c | 78 +++++++++++++++++++-
+ configs/mt7986a_bpir3_emmc_defconfig | 2 +
+ configs/mt7986a_bpir3_sd_defconfig | 2 +
+ 5 files changed, 95 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/dts/mt7986a-acer-connect-vero-w.dts
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 3561e4c3651..b21881b9a1c 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -1200,6 +1200,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+ mt7986a-bpi-r3-sd.dtb \
+ mt7986a-bpi-r3-emmc.dtb \
+ mt7986a-bpi-r3-mini.dtb \
++ mt7986a-acer-connect-vero-w.dtb \
+ mt7986a-rfb.dtb \
+ mt7986b-rfb.dtb \
+ mt7986a-sd-rfb.dtb \
+diff --git a/arch/arm/dts/mt7986a-acer-connect-vero-w.dts b/arch/arm/dts/mt7986a-acer-connect-vero-w.dts
+new file mode 100644
+index 00000000000..2e18c3eb717
+--- /dev/null
++++ b/arch/arm/dts/mt7986a-acer-connect-vero-w.dts
+@@ -0,0 +1,13 @@
++// SPDX-License-Identifier: GPL-2.0
++
++/dts-v1/;
++#include "mt7986a-bpi-r3-emmc.dts"
++
++/ {
++ model = "Acer Connect Vero W";
++ compatible = "acer,connect-vero-w", "mediatek,mt7986";
++};
++
++&{/memory@40000000} {
++ reg = <0x40000000 0x40000000>;
++};
+diff --git a/board/mediatek/mt7986/bpir3.c b/board/mediatek/mt7986/bpir3.c
+index 01eef55bb74..695db8725d9 100644
+--- a/board/mediatek/mt7986/bpir3.c
++++ b/board/mediatek/mt7986/bpir3.c
+@@ -1,14 +1,16 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+- * BPI-R3 / BPI-R3-mini board variant detection
++ * BPI-R3 / BPI-R3-mini / Acer Connect Vero W board variant detection
+ */
+
+ #include
+ #include
+ #include
++#include
+ #include
+ #include
+ #include
++#include
+ #include
+
+ DECLARE_GLOBAL_DATA_PTR;
+@@ -16,8 +18,74 @@ DECLARE_GLOBAL_DATA_PTR;
+ enum bpir3_variant {
+ BPIR3,
+ BPIR3_MINI,
++ ASUS_VERO_W,
+ };
+
++/*
++ * Acer Connect Vero W ships with 1 GiB DDR; BPI-R3 and BPI-R3-mini
++ * both ship with 2 GiB. Probe the +1 GiB mark with patterns that are
++ * distinct from a parallel write at the DRAM base, so an aliased
++ * (wrap-around) address is detected as such instead of returning a
++ * false positive when the DDR controller mirrors the high address
++ * onto base RAM.
++ *
++ * MT7986 DRAM base is 0x40000000. NOTE: when this board file is
++ * chain-loaded via "go" from a previous U-Boot, the dcache is
++ * already enabled. We must flush after writes and invalidate before
++ * reads so the test actually exercises the AXI/DDR bus instead of
++ * giving a false positive from cache hits at +1 GiB.
++ */
++#define MT7986_DRAM_BASE 0x40000000UL
++#define PROBE_BASE_ADDR MT7986_DRAM_BASE
++#define PROBE_HIGH_ADDR (MT7986_DRAM_BASE + SZ_1G)
++#define PROBE_LINE_BYTES 64 /* worst-case ARMv8 cacheline */
++
++static void probe_flush(unsigned long addr)
++{
++ flush_dcache_range(addr, addr + PROBE_LINE_BYTES);
++}
++
++static void probe_invalidate(unsigned long addr)
++{
++ invalidate_dcache_range(addr, addr + PROBE_LINE_BYTES);
++}
++
++static u32 probe_read(unsigned long addr)
++{
++ probe_invalidate(addr);
++ return *(volatile u32 *)addr;
++}
++
++static void probe_write(unsigned long addr, u32 val)
++{
++ *(volatile u32 *)addr = val;
++ probe_flush(addr);
++}
++
++static bool ram_above_1g_present(void)
++{
++ u32 sb, sp, b1, p1, b2, p2;
++
++ sb = probe_read(PROBE_BASE_ADDR);
++ sp = probe_read(PROBE_HIGH_ADDR);
++
++ probe_write(PROBE_BASE_ADDR, 0x12345678);
++ probe_write(PROBE_HIGH_ADDR, 0xdeadbeef);
++ b1 = probe_read(PROBE_BASE_ADDR);
++ p1 = probe_read(PROBE_HIGH_ADDR);
++
++ probe_write(PROBE_BASE_ADDR, 0xa5a5a5a5);
++ probe_write(PROBE_HIGH_ADDR, 0x5a5a5a5a);
++ b2 = probe_read(PROBE_BASE_ADDR);
++ p2 = probe_read(PROBE_HIGH_ADDR);
++
++ probe_write(PROBE_BASE_ADDR, sb);
++ probe_write(PROBE_HIGH_ADDR, sp);
++
++ return b1 == 0x12345678 && p1 == 0xdeadbeef &&
++ b2 == 0xa5a5a5a5 && p2 == 0x5a5a5a5a;
++}
++
+ /*
+ * Detect BPI-R3 vs BPI-R3-mini by probing for the Airoha EN8811H PHY.
+ *
+@@ -171,6 +239,10 @@ static enum bpir3_variant detect_bpir3_variant(void)
+ unsigned int pwr_b[] = { EN8811H_PWR_B_GPIO, EN8811H_PWR2_B_GPIO };
+ unsigned int i;
+
++ /* 1 GiB DDR → Acer Connect Vero W; skip MDIO probe entirely. */
++ if (!ram_above_1g_present())
++ return ASUS_VERO_W;
++
+ /* Switch GPIO67 (MDC) and GPIO68 (MDIO) to eth function */
+ gpio_set_mode(MDC_GPIO, 1);
+ gpio_set_mode(MDIO_GPIO, 1);
+@@ -207,6 +279,8 @@ int board_fit_config_name_match(const char *name)
+ switch (variant) {
+ case BPIR3_MINI:
+ return strcmp(name, "mt7986a-bpi-r3-mini") ? -1 : 0;
++ case ASUS_VERO_W:
++ return strcmp(name, "mt7986a-acer-connect-vero-w") ? -1 : 0;
+ case BPIR3:
+ default:
+ /*
+@@ -224,6 +298,8 @@ int board_late_init(void)
+
+ if (model && strstr(model, "Mini"))
+ env_set("fdtfile", "mediatek/mt7986a-bananapi-bpi-r3-mini.dtb");
++ else if (model && strstr(model, "Vero"))
++ env_set("fdtfile", "mediatek/mt7986a-acer-connect-vero-w.dtb");
+
+ return 0;
+ }
+diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig
+index 193acb4a9b4..dff2f6f164e 100644
+--- a/configs/mt7986a_bpir3_emmc_defconfig
++++ b/configs/mt7986a_bpir3_emmc_defconfig
+@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x80000
+ CONFIG_ENV_OFFSET=0x300000
+ CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-emmc"
++CONFIG_OF_LIST="mt7986a-bpi-r3-sd mt7986a-bpi-r3-emmc mt7986a-bpi-r3-mini mt7986a-acer-connect-vero-w"
++CONFIG_MULTI_DTB_FIT=y
+ CONFIG_TARGET_MT7986=y
+ CONFIG_BOARD_BPI_R3=y
+ CONFIG_SPL_LOAD_FIT=y
+diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig
+index e498b58a4a5..f281f570075 100644
+--- a/configs/mt7986a_bpir3_sd_defconfig
++++ b/configs/mt7986a_bpir3_sd_defconfig
+@@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x80000
+ CONFIG_ENV_OFFSET=0x300000
+ CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-sd"
++CONFIG_OF_LIST="mt7986a-bpi-r3-sd mt7986a-bpi-r3-emmc mt7986a-bpi-r3-mini mt7986a-acer-connect-vero-w"
++CONFIG_MULTI_DTB_FIT=y
+ CONFIG_TARGET_MT7986=y
+ CONFIG_BOARD_BPI_R3=y
+ CONFIG_SPL_LOAD_FIT=y
+--
+2.43.0
+
diff --git a/src/confd/yang/confd.inc b/src/confd/yang/confd.inc
index 291bc4ca..d8d45592 100644
--- a/src/confd/yang/confd.inc
+++ b/src/confd/yang/confd.inc
@@ -27,7 +27,7 @@ MODULES=(
"infix-syslog@2025-11-17.yang"
"iana-hardware@2018-03-13.yang"
"ietf-hardware@2018-03-13.yang -e hardware-state -e hardware-sensor"
- "infix-hardware@2026-02-08.yang"
+ "infix-hardware@2026-03-01.yang"
"ieee802-dot1q-types@2022-10-29.yang"
"infix-ip@2026-04-28.yang"
"infix-if-type@2026-01-07.yang"
diff --git a/utils/mkimage.sh b/utils/mkimage.sh
index 4bc8896b..83473cdc 100755
--- a/utils/mkimage.sh
+++ b/utils/mkimage.sh
@@ -182,6 +182,9 @@ get_bootloader_name()
raspberrypi-rpi64)
echo "rpi64_boot"
;;
+ acer-connect-vero-w)
+ echo "bpi_r3_emmc_boot"
+ ;;
bananapi-bpi-r3)
if [ "$target" = "emmc" ]; then
echo "bpi_r3_emmc_boot"
@@ -597,7 +600,7 @@ log "Generating genimage configuration for $BOARD..."
GENIMAGE_CFG="${BUILD_DIR}/genimage.cfg"
GENIMAGE_TEMPLATE="$BOARD_DIR/genimage.cfg.in"
-[ -f "$GENIMAGE_TEMPLATE" ] || die "genimage.cfg.in not found in $BOARD_DIR"
+[ -f "$GENIMAGE_TEMPLATE" ] || die "$(basename "$GENIMAGE_TEMPLATE") not found in $BOARD_DIR"
# Check if board needs special boot file discovery (Raspberry Pi)
if { [ "$BOARD" = "raspberrypi-rpi2" ] || [ "$BOARD" = "raspberrypi-rpi64" ]; } && grep -q '#BOOT_FILES#' "$GENIMAGE_TEMPLATE"; then