diff --git a/doc/ChangeLog.md b/doc/ChangeLog.md index b7c1280d..cda2732f 100644 --- a/doc/ChangeLog.md +++ b/doc/ChangeLog.md @@ -20,6 +20,7 @@ All notable changes to the project are documented in this file. whatever reason, in its 'setup' state - Fix #990: web console, ttyd service, stopped working after upgrade to Buildroot 2025.02, caused by new (missing) option `--writable` + - Fix TCAM memory corruption in `mvpp2` Ethernet controller [v25.02.0][] - 2025-03-04 diff --git a/patches/linux/6.12.21/0001-FIX-net-dsa-mv88e6xxx-Fix-timeout-on-waiting-for-PPU.patch b/patches/linux/6.12.21/0001-FIX-net-dsa-mv88e6xxx-Fix-timeout-on-waiting-for-PPU.patch index 9ee6b61e..04a8f7fb 100644 --- a/patches/linux/6.12.21/0001-FIX-net-dsa-mv88e6xxx-Fix-timeout-on-waiting-for-PPU.patch +++ b/patches/linux/6.12.21/0001-FIX-net-dsa-mv88e6xxx-Fix-timeout-on-waiting-for-PPU.patch @@ -1,18 +1,15 @@ From 774cf1d3f5b9cfac247c3efcf4eed39d06c675dc Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 12 Mar 2024 10:27:24 +0100 -Subject: [PATCH 01/26] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for +Subject: [PATCH 01/27] [FIX] net: dsa: mv88e6xxx: Fix timeout on waiting for PPU on 6393X -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires In a multi-chip setup, delays of up to 750ms are observed before the device (6393X) signals completion of PPU initialization (Global 1, register 0, bit 15). Therefore, increase the timeout threshold to 1s. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/patches/linux/6.12.21/0002-net-dsa-mv88e6xxx-Improve-indirect-register-access-p.patch b/patches/linux/6.12.21/0002-net-dsa-mv88e6xxx-Improve-indirect-register-access-p.patch index 09636baa..99f7b531 100644 --- a/patches/linux/6.12.21/0002-net-dsa-mv88e6xxx-Improve-indirect-register-access-p.patch +++ b/patches/linux/6.12.21/0002-net-dsa-mv88e6xxx-Improve-indirect-register-access-p.patch @@ -1,11 +1,8 @@ From 6bd6c3c49c438e35d61669879b64b6c4a00d1a19 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 27 Mar 2024 15:52:43 +0100 -Subject: [PATCH 02/26] net: dsa: mv88e6xxx: Improve indirect register access +Subject: [PATCH 02/27] net: dsa: mv88e6xxx: Improve indirect register access perf on 6393 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires When operating in multi-chip mode, the 6393 family maps a subset of @@ -17,7 +14,7 @@ Therefore, add a new set of SMI operations which remaps accesses to such registers to the corresponding directly addressable register. All other accesses use the regular indirect interface. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 7 +++ drivers/net/dsa/mv88e6xxx/global1.h | 3 ++ diff --git a/patches/linux/6.12.21/0003-net-dsa-mv88e6xxx-Honor-ports-being-managed-via-in-b.patch b/patches/linux/6.12.21/0003-net-dsa-mv88e6xxx-Honor-ports-being-managed-via-in-b.patch index be36d84b..27cf50d6 100644 --- a/patches/linux/6.12.21/0003-net-dsa-mv88e6xxx-Honor-ports-being-managed-via-in-b.patch +++ b/patches/linux/6.12.21/0003-net-dsa-mv88e6xxx-Honor-ports-being-managed-via-in-b.patch @@ -1,11 +1,8 @@ From 02bb753cee9b24a3a1bcbcd15c3729144200eafc Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Mon, 22 Apr 2024 23:18:01 +0200 -Subject: [PATCH 03/26] net: dsa: mv88e6xxx: Honor ports being managed via +Subject: [PATCH 03/27] net: dsa: mv88e6xxx: Honor ports being managed via in-band-status -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Keep all link parameters in their unforced states when the port is @@ -17,7 +14,7 @@ This state is the default set up by mv88e6xxx_port_setup_mac(), so all we have to do is to make the phylink MAC callbacks no-ops in cases when in-band-status is being used. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/patches/linux/6.12.21/0004-net-dsa-mv88e6xxx-Limit-rsvd2cpu-policy-to-user-port.patch b/patches/linux/6.12.21/0004-net-dsa-mv88e6xxx-Limit-rsvd2cpu-policy-to-user-port.patch index 1d7da44e..45b222ba 100644 --- a/patches/linux/6.12.21/0004-net-dsa-mv88e6xxx-Limit-rsvd2cpu-policy-to-user-port.patch +++ b/patches/linux/6.12.21/0004-net-dsa-mv88e6xxx-Limit-rsvd2cpu-policy-to-user-port.patch @@ -1,11 +1,8 @@ From 6cbb6a0a54d81ff5b117b023ac7e251ab1e9c556 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 24 Apr 2024 22:41:04 +0200 -Subject: [PATCH 04/26] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user +Subject: [PATCH 04/27] net: dsa: mv88e6xxx: Limit rsvd2cpu policy to user ports on 6393X -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires For packets with a DA in the IEEE reserved L2 group range, originating @@ -33,7 +30,7 @@ switch would try to trap it back to the CPU. Given that the CPU is trusted, instead assume that it indeed meant for the packet to be forwarded like any other. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/port.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/patches/linux/6.12.21/0005-net-dsa-mv88e6xxx-Add-LED-infrastructure.patch b/patches/linux/6.12.21/0005-net-dsa-mv88e6xxx-Add-LED-infrastructure.patch index 02f5e5fd..f8b166dd 100644 --- a/patches/linux/6.12.21/0005-net-dsa-mv88e6xxx-Add-LED-infrastructure.patch +++ b/patches/linux/6.12.21/0005-net-dsa-mv88e6xxx-Add-LED-infrastructure.patch @@ -1,16 +1,13 @@ From 86b1608084c6e9676db0641f31203d8067893470 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Thu, 16 Nov 2023 19:44:32 +0100 -Subject: [PATCH 05/26] net: dsa: mv88e6xxx: Add LED infrastructure -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 05/27] net: dsa: mv88e6xxx: Add LED infrastructure Organization: Wires Parse DT for LEDs and register them for devices that support it, though no actual implementations exist yet. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/Makefile | 1 + drivers/net/dsa/mv88e6xxx/chip.c | 5 +- diff --git a/patches/linux/6.12.21/0006-net-dsa-mv88e6xxx-Add-LED-support-for-6393X.patch b/patches/linux/6.12.21/0006-net-dsa-mv88e6xxx-Add-LED-support-for-6393X.patch index 43f50589..40f7dac4 100644 --- a/patches/linux/6.12.21/0006-net-dsa-mv88e6xxx-Add-LED-support-for-6393X.patch +++ b/patches/linux/6.12.21/0006-net-dsa-mv88e6xxx-Add-LED-support-for-6393X.patch @@ -1,10 +1,7 @@ From 5496a27ee644f72b721eba0e8c057efb65ee445f Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Thu, 16 Nov 2023 21:59:35 +0100 -Subject: [PATCH 06/26] net: dsa: mv88e6xxx: Add LED support for 6393X -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 06/27] net: dsa: mv88e6xxx: Add LED support for 6393X Organization: Wires Trigger support: @@ -12,7 +9,7 @@ Trigger support: - "timer" - "netdev" -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 1 + drivers/net/dsa/mv88e6xxx/leds.c | 229 +++++++++++++++++++++++++++++++ diff --git a/patches/linux/6.12.21/0007-net-dsa-tag_dsa-Use-tag-priority-as-initial-skb-prio.patch b/patches/linux/6.12.21/0007-net-dsa-tag_dsa-Use-tag-priority-as-initial-skb-prio.patch index 55bf9d55..b314e1c6 100644 --- a/patches/linux/6.12.21/0007-net-dsa-tag_dsa-Use-tag-priority-as-initial-skb-prio.patch +++ b/patches/linux/6.12.21/0007-net-dsa-tag_dsa-Use-tag-priority-as-initial-skb-prio.patch @@ -1,11 +1,8 @@ From a0e2ebe61422d5e0e330022a2a38a31c049a4407 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 28 May 2024 10:38:42 +0200 -Subject: [PATCH 07/26] net: dsa: tag_dsa: Use tag priority as initial +Subject: [PATCH 07/27] net: dsa: tag_dsa: Use tag priority as initial skb->priority -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Use the 3-bit priority field from the DSA tag as the initial packet @@ -23,7 +20,7 @@ can do with an "ingress-qos-map" on VLAN interfaces. Until that is implemented, support the setup that is likely to be the most common; a 1:1 mapping from FPri to skb->priority. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- net/dsa/tag_dsa.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/patches/linux/6.12.21/0008-net-dsa-Support-MDB-memberships-whose-L2-addresses-o.patch b/patches/linux/6.12.21/0008-net-dsa-Support-MDB-memberships-whose-L2-addresses-o.patch index 086836ac..16214e7c 100644 --- a/patches/linux/6.12.21/0008-net-dsa-Support-MDB-memberships-whose-L2-addresses-o.patch +++ b/patches/linux/6.12.21/0008-net-dsa-Support-MDB-memberships-whose-L2-addresses-o.patch @@ -1,11 +1,8 @@ From a88679c946d5163eb0e30718109c18ddbbd8cfc6 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 16 Jan 2024 16:00:55 +0100 -Subject: [PATCH 08/26] net: dsa: Support MDB memberships whose L2 addresses +Subject: [PATCH 08/27] net: dsa: Support MDB memberships whose L2 addresses overlap -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Multiple IP multicast groups (32 for v4, 2^80 for v6) map to the same @@ -33,7 +30,7 @@ needed to do this is already in place, since it is also needed on CPU and DSA ports. Thus, "implement" this by simply removing the guards which previously skipped reference countung on user ports. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- net/dsa/switch.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/patches/linux/6.12.21/0009-net-dsa-Support-EtherType-based-priority-overrides.patch b/patches/linux/6.12.21/0009-net-dsa-Support-EtherType-based-priority-overrides.patch index 0d8a0586..b0debf6a 100644 --- a/patches/linux/6.12.21/0009-net-dsa-Support-EtherType-based-priority-overrides.patch +++ b/patches/linux/6.12.21/0009-net-dsa-Support-EtherType-based-priority-overrides.patch @@ -1,13 +1,10 @@ From c6528f18fbafef721c18e546aa0b60c1b1d772c6 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Thu, 21 Mar 2024 19:12:15 +0100 -Subject: [PATCH 09/26] net: dsa: Support EtherType based priority overrides -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 09/27] net: dsa: Support EtherType based priority overrides Organization: Wires -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- include/net/dsa.h | 4 ++++ net/dsa/user.c | 56 +++++++++++++++++++++++++++++++++++++++++++++-- diff --git a/patches/linux/6.12.21/0010-net-dsa-mv88e6xxx-Support-EtherType-based-priority-o.patch b/patches/linux/6.12.21/0010-net-dsa-mv88e6xxx-Support-EtherType-based-priority-o.patch index c1c7a720..0a54624a 100644 --- a/patches/linux/6.12.21/0010-net-dsa-mv88e6xxx-Support-EtherType-based-priority-o.patch +++ b/patches/linux/6.12.21/0010-net-dsa-mv88e6xxx-Support-EtherType-based-priority-o.patch @@ -1,14 +1,11 @@ From bc41b93b365694ac36a19565270b8deda3b8cb79 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Fri, 22 Mar 2024 16:15:43 +0100 -Subject: [PATCH 10/26] net: dsa: mv88e6xxx: Support EtherType based priority +Subject: [PATCH 10/27] net: dsa: mv88e6xxx: Support EtherType based priority overrides -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 64 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 21 ++++++++++ diff --git a/patches/linux/6.12.21/0011-net-dsa-mv88e6xxx-Add-mqprio-qdisc-support.patch b/patches/linux/6.12.21/0011-net-dsa-mv88e6xxx-Add-mqprio-qdisc-support.patch index b09f3cdb..3076d340 100644 --- a/patches/linux/6.12.21/0011-net-dsa-mv88e6xxx-Add-mqprio-qdisc-support.patch +++ b/patches/linux/6.12.21/0011-net-dsa-mv88e6xxx-Add-mqprio-qdisc-support.patch @@ -1,10 +1,7 @@ From 70c1d59448db0ec88c07fa4ff5748b0df740a8d2 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 28 May 2024 11:04:22 +0200 -Subject: [PATCH 11/26] net: dsa: mv88e6xxx: Add mqprio qdisc support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 11/27] net: dsa: mv88e6xxx: Add mqprio qdisc support Organization: Wires Add support for attaching mqprio qdisc's to mv88e6xxx ports and use @@ -28,7 +25,7 @@ Since FPri is always a 3-bit field, even on older chips with only 4 physical queues, always report 8 queues and let the chip's policy handle the mapping down to the "real" number. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 70 ++++++++++++++++++++++++++++++++ net/dsa/tag_dsa.c | 4 +- diff --git a/patches/linux/6.12.21/0012-net-dsa-mv88e6xxx-Use-VLAN-prio-over-IP-when-both-ar.patch b/patches/linux/6.12.21/0012-net-dsa-mv88e6xxx-Use-VLAN-prio-over-IP-when-both-ar.patch index e18bdc34..da0a2d69 100644 --- a/patches/linux/6.12.21/0012-net-dsa-mv88e6xxx-Use-VLAN-prio-over-IP-when-both-ar.patch +++ b/patches/linux/6.12.21/0012-net-dsa-mv88e6xxx-Use-VLAN-prio-over-IP-when-both-ar.patch @@ -1,11 +1,8 @@ From c3721cb1cccf3c8fe18bea05c9ad20e7082291bd Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 29 May 2024 13:20:41 +0200 -Subject: [PATCH 12/26] net: dsa: mv88e6xxx: Use VLAN prio over IP when both +Subject: [PATCH 12/27] net: dsa: mv88e6xxx: Use VLAN prio over IP when both are available -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Switch the priority sourcing precdence to prefer VLAN PCP over IP @@ -26,7 +23,7 @@ main reasons for choosing the new default: core over trusted VLAN trunks, the packet should keep its original priority, independent of what inner protocol fields may indicate. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/patches/linux/6.12.21/0013-FIX-net-dsa-mv88e6xxx-Trap-locally-terminated-VLANs.patch b/patches/linux/6.12.21/0013-FIX-net-dsa-mv88e6xxx-Trap-locally-terminated-VLANs.patch index eff13434..dbf15c56 100644 --- a/patches/linux/6.12.21/0013-FIX-net-dsa-mv88e6xxx-Trap-locally-terminated-VLANs.patch +++ b/patches/linux/6.12.21/0013-FIX-net-dsa-mv88e6xxx-Trap-locally-terminated-VLANs.patch @@ -1,11 +1,8 @@ From 373d60426de6d19fd668e1e0b599ca430f351a18 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 26 Nov 2024 19:45:59 +0100 -Subject: [PATCH 13/26] [FIX] net: dsa: mv88e6xxx: Trap locally terminated +Subject: [PATCH 13/27] [FIX] net: dsa: mv88e6xxx: Trap locally terminated VLANs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Before this change, in a setup like the following, packets assigned to @@ -28,7 +25,7 @@ marked as policy entries. As the VTU policy of user ports is already set to TRAP (to ensure proper standalone port operation), this will cause all packets assigned to these VLANs to properly terminated. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 33 ++++++++++++++++++-------------- include/net/switchdev.h | 4 ++++ diff --git a/patches/linux/6.12.21/0014-net-phy-marvell10g-Support-firmware-loading-on-88X33.patch b/patches/linux/6.12.21/0014-net-phy-marvell10g-Support-firmware-loading-on-88X33.patch index a998e7b4..93f0320e 100644 --- a/patches/linux/6.12.21/0014-net-phy-marvell10g-Support-firmware-loading-on-88X33.patch +++ b/patches/linux/6.12.21/0014-net-phy-marvell10g-Support-firmware-loading-on-88X33.patch @@ -1,11 +1,8 @@ From a6368c60ac6ae2e0d97ac571b6506aa09becbb71 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 19 Sep 2023 18:38:10 +0200 -Subject: [PATCH 14/26] net: phy: marvell10g: Support firmware loading on +Subject: [PATCH 14/27] net: phy: marvell10g: Support firmware loading on 88X3310 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires When probing, if a device is waiting for firmware to be loaded into @@ -15,7 +12,7 @@ We have no choice but to bail out of the probe if firmware is not available, as the device does not have any built-in image on which to fall back. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/phy/marvell10g.c | 161 +++++++++++++++++++++++++++++++++++ 1 file changed, 161 insertions(+) diff --git a/patches/linux/6.12.21/0015-net-phy-marvell10g-Fix-power-up-when-strapped-to-sta.patch b/patches/linux/6.12.21/0015-net-phy-marvell10g-Fix-power-up-when-strapped-to-sta.patch index c9d48ac1..bc1b1005 100644 --- a/patches/linux/6.12.21/0015-net-phy-marvell10g-Fix-power-up-when-strapped-to-sta.patch +++ b/patches/linux/6.12.21/0015-net-phy-marvell10g-Fix-power-up-when-strapped-to-sta.patch @@ -1,18 +1,15 @@ From 550dd1b443cf9d054f2a523088fbe22b215e07cb Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 21 Nov 2023 20:15:24 +0100 -Subject: [PATCH 15/26] net: phy: marvell10g: Fix power-up when strapped to +Subject: [PATCH 15/27] net: phy: marvell10g: Fix power-up when strapped to start powered down -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires On devices which are hardware strapped to start powered down (PDSTATE == 1), make sure that we clear the power-down bit on all units affected by this setting. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/phy/marvell10g.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/patches/linux/6.12.21/0016-net-phy-marvell10g-Add-LED-support-for-88X3310.patch b/patches/linux/6.12.21/0016-net-phy-marvell10g-Add-LED-support-for-88X3310.patch index 9d41f9b0..94fae301 100644 --- a/patches/linux/6.12.21/0016-net-phy-marvell10g-Add-LED-support-for-88X3310.patch +++ b/patches/linux/6.12.21/0016-net-phy-marvell10g-Add-LED-support-for-88X3310.patch @@ -1,10 +1,7 @@ From 9ca4c28ccf7857a36db8dd3c37dcd005222bdb78 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 15 Nov 2023 20:58:42 +0100 -Subject: [PATCH 16/26] net: phy: marvell10g: Add LED support for 88X3310 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 16/27] net: phy: marvell10g: Add LED support for 88X3310 Organization: Wires Pickup the LEDs from the state in which the hardware reset or @@ -21,7 +18,7 @@ Trigger support: - "netdev": Offload link or duplex information to the solid behavior; tx and/or rx activity to blink behavior. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/phy/marvell10g.c | 422 +++++++++++++++++++++++++++++++++++ 1 file changed, 422 insertions(+) diff --git a/patches/linux/6.12.21/0017-net-phy-marvell10g-Support-LEDs-tied-to-a-single-med.patch b/patches/linux/6.12.21/0017-net-phy-marvell10g-Support-LEDs-tied-to-a-single-med.patch index d96d8b3b..c534bfdf 100644 --- a/patches/linux/6.12.21/0017-net-phy-marvell10g-Support-LEDs-tied-to-a-single-med.patch +++ b/patches/linux/6.12.21/0017-net-phy-marvell10g-Support-LEDs-tied-to-a-single-med.patch @@ -1,11 +1,8 @@ From 69f9bda6cab34556e67a096c282eee7337f97f26 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Tue, 12 Dec 2023 09:51:05 +0100 -Subject: [PATCH 17/26] net: phy: marvell10g: Support LEDs tied to a single +Subject: [PATCH 17/27] net: phy: marvell10g: Support LEDs tied to a single media side -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires In a combo-port setup, i.e. where both the copper and fiber interface @@ -18,7 +15,7 @@ the offloading of the "netdev" trigger, such that LEDs attached to the RJ45 jack only lights up when a copper link is established, and vice versa for the SFP cage. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/phy/marvell10g.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/patches/linux/6.12.21/0018-net-phy-Do-not-resume-PHY-when-attaching.patch b/patches/linux/6.12.21/0018-net-phy-Do-not-resume-PHY-when-attaching.patch index eb76d7bc..27fb1fdd 100644 --- a/patches/linux/6.12.21/0018-net-phy-Do-not-resume-PHY-when-attaching.patch +++ b/patches/linux/6.12.21/0018-net-phy-Do-not-resume-PHY-when-attaching.patch @@ -1,10 +1,7 @@ From f70be42f0ee50cda8c1cde14442ea8285c01834b Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 27 Mar 2024 10:10:19 +0100 -Subject: [PATCH 18/26] net: phy: Do not resume PHY when attaching -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 18/27] net: phy: Do not resume PHY when attaching Organization: Wires The PHY should not start negotiating with its link-partner until @@ -19,7 +16,7 @@ probing (e.g. DSA) would end up with a physical link being established, even though the corresponding interface was still administratively down. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/phy/phy_device.c | 1 - 1 file changed, 1 deletion(-) diff --git a/patches/linux/6.12.21/0019-net-bridge-avoid-classifying-unknown-multicast-as-mr.patch b/patches/linux/6.12.21/0019-net-bridge-avoid-classifying-unknown-multicast-as-mr.patch index 70e04c61..567c86ac 100644 --- a/patches/linux/6.12.21/0019-net-bridge-avoid-classifying-unknown-multicast-as-mr.patch +++ b/patches/linux/6.12.21/0019-net-bridge-avoid-classifying-unknown-multicast-as-mr.patch @@ -1,11 +1,8 @@ From 17d6f3f6a7429ae635d0359b39da2e173c403fdf Mon Sep 17 00:00:00 2001 From: Joachim Wiberg Date: Mon, 4 Mar 2024 16:47:28 +0100 -Subject: [PATCH 19/26] net: bridge: avoid classifying unknown multicast as +Subject: [PATCH 19/27] net: bridge: avoid classifying unknown multicast as mrouters_only -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Unknown multicast, MAC/IPv4/IPv6, should always be flooded according to @@ -19,7 +16,7 @@ Because a multicast router should always receive both known and unknown multicast. Signed-off-by: Joachim Wiberg -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- include/uapi/linux/if_bridge.h | 1 + net/bridge/br.c | 5 +++++ diff --git a/patches/linux/6.12.21/0020-net-bridge-Ignore-router-ports-when-forwarding-L2-mu.patch b/patches/linux/6.12.21/0020-net-bridge-Ignore-router-ports-when-forwarding-L2-mu.patch index 305c64b4..39991906 100644 --- a/patches/linux/6.12.21/0020-net-bridge-Ignore-router-ports-when-forwarding-L2-mu.patch +++ b/patches/linux/6.12.21/0020-net-bridge-Ignore-router-ports-when-forwarding-L2-mu.patch @@ -1,11 +1,8 @@ From 27ca82c96a6bcd560e908eed17fc24126e8051a6 Mon Sep 17 00:00:00 2001 From: Joachim Wiberg Date: Tue, 5 Mar 2024 06:44:41 +0100 -Subject: [PATCH 20/26] net: bridge: Ignore router ports when forwarding L2 +Subject: [PATCH 20/27] net: bridge: Ignore router ports when forwarding L2 multicast -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Multicast router ports are either statically configured or learned from @@ -15,7 +12,6 @@ of unknown multicast or using permanent MDB entries. Signed-off-by: Tobias Waldekranz Signed-off-by: Joachim Wiberg -Signed-off-by: Mattias Walström --- net/bridge/br_private.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/patches/linux/6.12.21/0021-net-bridge-drop-delay-for-applying-strict-multicast-.patch b/patches/linux/6.12.21/0021-net-bridge-drop-delay-for-applying-strict-multicast-.patch index ced616e6..d73f94c5 100644 --- a/patches/linux/6.12.21/0021-net-bridge-drop-delay-for-applying-strict-multicast-.patch +++ b/patches/linux/6.12.21/0021-net-bridge-drop-delay-for-applying-strict-multicast-.patch @@ -1,11 +1,8 @@ From bbbb4f7460efeaf057d37d837cae79a565a6d406 Mon Sep 17 00:00:00 2001 From: Joachim Wiberg Date: Thu, 4 Apr 2024 16:36:30 +0200 -Subject: [PATCH 21/26] net: bridge: drop delay for applying strict multicast +Subject: [PATCH 21/27] net: bridge: drop delay for applying strict multicast filtering -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires This *local* patch drops the initial delay before applying strict multicast @@ -22,7 +19,7 @@ A proper fix for upstreaming could be to add a knob to disable the delay. [2]: https://lore.kernel.org/netdev/20240127175033.9640-1-linus.luessing@c0d3.blue/ Signed-off-by: Joachim Wiberg -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- net/bridge/br_multicast.c | 42 +++++++-------------------------------- net/bridge/br_private.h | 4 +--- diff --git a/patches/linux/6.12.21/0022-net-bridge-Differentiate-MDB-additions-from-modifica.patch b/patches/linux/6.12.21/0022-net-bridge-Differentiate-MDB-additions-from-modifica.patch index 7a70e419..b2ed442b 100644 --- a/patches/linux/6.12.21/0022-net-bridge-Differentiate-MDB-additions-from-modifica.patch +++ b/patches/linux/6.12.21/0022-net-bridge-Differentiate-MDB-additions-from-modifica.patch @@ -1,11 +1,8 @@ From 7c751c24428060c3e87f164eb2a054db410f4b0d Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Thu, 16 May 2024 14:51:54 +0200 -Subject: [PATCH 22/26] net: bridge: Differentiate MDB additions from +Subject: [PATCH 22/27] net: bridge: Differentiate MDB additions from modifications -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Before this change, the reception of an IGMPv3 report (and analogously @@ -25,7 +22,7 @@ generated. Therefore, discriminate new groups from changes to existing groups by introducing a RTM_SETMDB events to be used in the latter scenario. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- include/uapi/linux/rtnetlink.h | 2 ++ net/bridge/br_mdb.c | 4 ++-- diff --git a/patches/linux/6.12.21/0023-nvmem-layouts-onie-tlv-Let-device-probe-even-when-TL.patch b/patches/linux/6.12.21/0023-nvmem-layouts-onie-tlv-Let-device-probe-even-when-TL.patch index 86eb7023..f3f870b1 100644 --- a/patches/linux/6.12.21/0023-nvmem-layouts-onie-tlv-Let-device-probe-even-when-TL.patch +++ b/patches/linux/6.12.21/0023-nvmem-layouts-onie-tlv-Let-device-probe-even-when-TL.patch @@ -1,11 +1,8 @@ From db0d727f6cc90ccea2378d876329c151db1670dc Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Fri, 24 Nov 2023 23:29:55 +0100 -Subject: [PATCH 23/26] nvmem: layouts: onie-tlv: Let device probe even when +Subject: [PATCH 23/27] nvmem: layouts: onie-tlv: Let device probe even when TLV is invalid -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires Before this change, probing an NVMEM device, expected to contain a @@ -17,7 +14,7 @@ be successfully probed. Therefore, settle for reporting data corruption issues in the log, and simply refrain from registering any cells in those cases. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/nvmem/layouts/onie-tlv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/patches/linux/6.12.21/0024-usb-core-adjust-log-level-for-unauthorized-devices.patch b/patches/linux/6.12.21/0024-usb-core-adjust-log-level-for-unauthorized-devices.patch index c418e83a..d666c5fa 100644 --- a/patches/linux/6.12.21/0024-usb-core-adjust-log-level-for-unauthorized-devices.patch +++ b/patches/linux/6.12.21/0024-usb-core-adjust-log-level-for-unauthorized-devices.patch @@ -1,10 +1,7 @@ From ed58f4b6e7344bdefceb7ac31d1c769a6d127827 Mon Sep 17 00:00:00 2001 From: Joachim Wiberg Date: Mon, 29 Apr 2024 15:14:51 +0200 -Subject: [PATCH 24/26] usb: core: adjust log level for unauthorized devices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 24/27] usb: core: adjust log level for unauthorized devices Organization: Wires The fact that a USB device currently is not authorized is not an error, @@ -12,7 +9,7 @@ so let's adjust the log level so these messages slip below radar for the commonly used 'quiet' log level. Signed-off-by: Joachim Wiberg -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/usb/core/driver.c | 4 ++-- drivers/usb/core/generic.c | 2 +- diff --git a/patches/linux/6.12.21/0025-net-dsa-mv88e6xxx-collapse-disabled-state-into-block.patch b/patches/linux/6.12.21/0025-net-dsa-mv88e6xxx-collapse-disabled-state-into-block.patch index 391528fa..1f9d986f 100644 --- a/patches/linux/6.12.21/0025-net-dsa-mv88e6xxx-collapse-disabled-state-into-block.patch +++ b/patches/linux/6.12.21/0025-net-dsa-mv88e6xxx-collapse-disabled-state-into-block.patch @@ -1,11 +1,8 @@ From e7f7ae788680b4ec73af736453ec4afeb34d9842 Mon Sep 17 00:00:00 2001 From: Joachim Wiberg Date: Thu, 16 Jan 2025 12:35:12 +0100 -Subject: [PATCH 25/26] net: dsa: mv88e6xxx: collapse disabled state into +Subject: [PATCH 25/27] net: dsa: mv88e6xxx: collapse disabled state into blocking -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires This patch changes the behavior of switchcore ports wrt. the port state. @@ -21,7 +18,7 @@ each member port, preventing LACPDUs from passing through to qualify the link and become active. Signed-off-by: Joachim Wiberg -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/port.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/patches/linux/6.12.21/0026-net-dsa-mv88e6xxx-Only-activate-LAG-offloading-when-.patch b/patches/linux/6.12.21/0026-net-dsa-mv88e6xxx-Only-activate-LAG-offloading-when-.patch index 8bbd6956..0337cc7c 100644 --- a/patches/linux/6.12.21/0026-net-dsa-mv88e6xxx-Only-activate-LAG-offloading-when-.patch +++ b/patches/linux/6.12.21/0026-net-dsa-mv88e6xxx-Only-activate-LAG-offloading-when-.patch @@ -1,11 +1,8 @@ From 823687aa03d866f3b76b5e40e35fa56c7f6f4492 Mon Sep 17 00:00:00 2001 From: Tobias Waldekranz Date: Wed, 12 Feb 2025 22:03:14 +0100 -Subject: [PATCH 26/26] net: dsa: mv88e6xxx: Only activate LAG offloading when +Subject: [PATCH 26/27] net: dsa: mv88e6xxx: Only activate LAG offloading when bridged -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit Organization: Wires The current port isolation scheme for mv88e6xxx is detailed here: @@ -50,7 +47,7 @@ Before joining a bridge, the offload does not offer any performance benefit anyway. All ingressing packet will always have to go to the CPU; egress traffic always relies on software hashing. -Signed-off-by: Mattias Walström +Signed-off-by: Tobias Waldekranz --- drivers/net/dsa/mv88e6xxx/chip.c | 42 +++++++++++++++----------------- 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/patches/linux/6.12.21/0027-net-mvpp2-Prevent-parser-TCAM-memory-corruption.patch b/patches/linux/6.12.21/0027-net-mvpp2-Prevent-parser-TCAM-memory-corruption.patch new file mode 100644 index 00000000..0d1a8b81 --- /dev/null +++ b/patches/linux/6.12.21/0027-net-mvpp2-Prevent-parser-TCAM-memory-corruption.patch @@ -0,0 +1,651 @@ +From f33dc6fb8cd78eb3b1b2ea3de68b8a54efabdac2 Mon Sep 17 00:00:00 2001 +From: Tobias Waldekranz +Date: Tue, 18 Mar 2025 10:55:09 +0100 +Subject: [PATCH 27/27] net: mvpp2: Prevent parser TCAM memory corruption +Organization: Wires + +Protect the parser TCAM/SRAM memory, and the cached (shadow) SRAM +information, from concurrent modifications. + +Both the TCAM and SRAM tables are indirectly accessed by configuring +an index register that selects the row to read or write to. This means +that operations must be atomic in order to, e.g., avoid spreading +writes across multiple rows. Since the shadow SRAM array is used to +find free rows in the hardware table, it must also be protected in +order to avoid TOCTOU errors where multiple cores allocate the same +row. + +This issue was detected in a situation where `mvpp2_set_rx_mode()` ran +concurrently on two CPUs. In this particular case the +MVPP2_PE_MAC_UC_PROMISCUOUS entry was corrupted, causing the +classifier unit to drop all incoming unicast - indicated by the +`rx_classifier_drops` counter. + +Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network unit") +Signed-off-by: Tobias Waldekranz +--- + drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 3 + + .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +- + .../net/ethernet/marvell/mvpp2/mvpp2_prs.c | 201 ++++++++++++------ + 3 files changed, 140 insertions(+), 67 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +index 9e02e4367bec..9bd3d76b5fe2 100644 +--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h ++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +@@ -1108,6 +1108,9 @@ struct mvpp2 { + + /* Spinlocks for CM3 shared memory configuration */ + spinlock_t mss_spinlock; ++ ++ /* Spinlock for shared PRS parser memory and shadow table */ ++ spinlock_t prs_spinlock; + }; + + struct mvpp2_pcpu_stats { +diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +index 3880dcc0418b..66b5a80c9c28 100644 +--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c ++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +@@ -7640,8 +7640,9 @@ static int mvpp2_probe(struct platform_device *pdev) + if (mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23) + priv->hw_version = MVPP23; + +- /* Init mss lock */ ++ /* Init locks for shared packet processor resources */ + spin_lock_init(&priv->mss_spinlock); ++ spin_lock_init(&priv->prs_spinlock); + + /* Initialize network controller */ + err = mvpp2_init(pdev, priv); +diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c +index 9af22f497a40..a96edc7dc0de 100644 +--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c ++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c +@@ -23,6 +23,8 @@ static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) + { + int i; + ++ lockdep_assert_held(&priv->prs_spinlock); ++ + if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) + return -EINVAL; + +@@ -43,11 +45,13 @@ static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) + } + + /* Initialize tcam entry from hw */ +-int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, +- int tid) ++static int mvpp2_prs_init_from_hw_unlocked(struct mvpp2 *priv, ++ struct mvpp2_prs_entry *pe, int tid) + { + int i; + ++ lockdep_assert_held(&priv->prs_spinlock); ++ + if (tid > MVPP2_PRS_TCAM_SRAM_SIZE - 1) + return -EINVAL; + +@@ -73,6 +77,18 @@ int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, + return 0; + } + ++int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, ++ int tid) ++{ ++ int err; ++ ++ spin_lock_bh(&priv->prs_spinlock); ++ err = mvpp2_prs_init_from_hw_unlocked(priv, pe, tid); ++ spin_unlock_bh(&priv->prs_spinlock); ++ ++ return err; ++} ++ + /* Invalidate tcam hw entry */ + static void mvpp2_prs_hw_inv(struct mvpp2 *priv, int index) + { +@@ -374,7 +390,7 @@ static int mvpp2_prs_flow_find(struct mvpp2 *priv, int flow) + priv->prs_shadow[tid].lu != MVPP2_PRS_LU_FLOWS) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + bits = mvpp2_prs_sram_ai_get(&pe); + + /* Sram store classification lookup ID in AI bits [5:0] */ +@@ -441,7 +457,7 @@ static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add) + + if (priv->prs_shadow[MVPP2_PE_DROP_ALL].valid) { + /* Entry exist - update port only */ +- mvpp2_prs_init_from_hw(priv, &pe, MVPP2_PE_DROP_ALL); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, MVPP2_PE_DROP_ALL); + } else { + /* Entry doesn't exist - create new */ + memset(&pe, 0, sizeof(pe)); +@@ -469,14 +485,17 @@ static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add) + } + + /* Set port to unicast or multicast promiscuous mode */ +-void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port, +- enum mvpp2_prs_l2_cast l2_cast, bool add) ++static void mvpp2_prs_mac_promisc_set_unlocked(struct mvpp2 *priv, int port, ++ enum mvpp2_prs_l2_cast l2_cast, ++ bool add) + { + struct mvpp2_prs_entry pe; + unsigned char cast_match; + unsigned int ri; + int tid; + ++ lockdep_assert_held(&priv->prs_spinlock); ++ + if (l2_cast == MVPP2_PRS_L2_UNI_CAST) { + cast_match = MVPP2_PRS_UCAST_VAL; + tid = MVPP2_PE_MAC_UC_PROMISCUOUS; +@@ -489,7 +508,7 @@ void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port, + + /* promiscuous mode - Accept unknown unicast or multicast packets */ + if (priv->prs_shadow[tid].valid) { +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } else { + memset(&pe, 0, sizeof(pe)); + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_MAC); +@@ -522,6 +541,14 @@ void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port, + mvpp2_prs_hw_write(priv, &pe); + } + ++void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port, ++ enum mvpp2_prs_l2_cast l2_cast, bool add) ++{ ++ spin_lock_bh(&priv->prs_spinlock); ++ mvpp2_prs_mac_promisc_set_unlocked(priv, port, l2_cast, add); ++ spin_unlock_bh(&priv->prs_spinlock); ++} ++ + /* Set entry for dsa packets */ + static void mvpp2_prs_dsa_tag_set(struct mvpp2 *priv, int port, bool add, + bool tagged, bool extend) +@@ -539,7 +566,7 @@ static void mvpp2_prs_dsa_tag_set(struct mvpp2 *priv, int port, bool add, + + if (priv->prs_shadow[tid].valid) { + /* Entry exist - update port only */ +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } else { + /* Entry doesn't exist - create new */ + memset(&pe, 0, sizeof(pe)); +@@ -610,7 +637,7 @@ static void mvpp2_prs_dsa_tag_ethertype_set(struct mvpp2 *priv, int port, + + if (priv->prs_shadow[tid].valid) { + /* Entry exist - update port only */ +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } else { + /* Entry doesn't exist - create new */ + memset(&pe, 0, sizeof(pe)); +@@ -673,7 +700,7 @@ static int mvpp2_prs_vlan_find(struct mvpp2 *priv, unsigned short tpid, int ai) + priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + match = mvpp2_prs_tcam_data_cmp(&pe, 0, tpid); + if (!match) + continue; +@@ -726,7 +753,7 @@ static int mvpp2_prs_vlan_add(struct mvpp2 *priv, unsigned short tpid, int ai, + priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid_aux); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid_aux); + ri_bits = mvpp2_prs_sram_ri_get(&pe); + if ((ri_bits & MVPP2_PRS_RI_VLAN_MASK) == + MVPP2_PRS_RI_VLAN_DOUBLE) +@@ -760,7 +787,7 @@ static int mvpp2_prs_vlan_add(struct mvpp2 *priv, unsigned short tpid, int ai, + + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VLAN); + } else { +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } + /* Update ports' mask */ + mvpp2_prs_tcam_port_map_set(&pe, port_map); +@@ -800,7 +827,7 @@ static int mvpp2_prs_double_vlan_find(struct mvpp2 *priv, unsigned short tpid1, + priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + + match = mvpp2_prs_tcam_data_cmp(&pe, 0, tpid1) && + mvpp2_prs_tcam_data_cmp(&pe, 4, tpid2); +@@ -849,7 +876,7 @@ static int mvpp2_prs_double_vlan_add(struct mvpp2 *priv, unsigned short tpid1, + priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid_aux); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid_aux); + ri_bits = mvpp2_prs_sram_ri_get(&pe); + ri_bits &= MVPP2_PRS_RI_VLAN_MASK; + if (ri_bits == MVPP2_PRS_RI_VLAN_SINGLE || +@@ -880,7 +907,7 @@ static int mvpp2_prs_double_vlan_add(struct mvpp2 *priv, unsigned short tpid1, + + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VLAN); + } else { +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } + + /* Update ports' mask */ +@@ -1213,8 +1240,8 @@ static void mvpp2_prs_mac_init(struct mvpp2 *priv) + /* Create dummy entries for drop all and promiscuous modes */ + mvpp2_prs_drop_fc(priv); + mvpp2_prs_mac_drop_all_set(priv, 0, false); +- mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_UNI_CAST, false); +- mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_MULTI_CAST, false); ++ mvpp2_prs_mac_promisc_set_unlocked(priv, 0, MVPP2_PRS_L2_UNI_CAST, false); ++ mvpp2_prs_mac_promisc_set_unlocked(priv, 0, MVPP2_PRS_L2_MULTI_CAST, false); + } + + /* Set default entries for various types of dsa packets */ +@@ -1533,12 +1560,6 @@ static int mvpp2_prs_vlan_init(struct platform_device *pdev, struct mvpp2 *priv) + struct mvpp2_prs_entry pe; + int err; + +- priv->prs_double_vlans = devm_kcalloc(&pdev->dev, sizeof(bool), +- MVPP2_PRS_DBL_VLANS_MAX, +- GFP_KERNEL); +- if (!priv->prs_double_vlans) +- return -ENOMEM; +- + /* Double VLAN: 0x88A8, 0x8100 */ + err = mvpp2_prs_double_vlan_add(priv, ETH_P_8021AD, ETH_P_8021Q, + MVPP2_PRS_PORT_MASK); +@@ -1941,7 +1962,7 @@ static int mvpp2_prs_vid_range_find(struct mvpp2_port *port, u16 vid, u16 mask) + port->priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VID) + continue; + +- mvpp2_prs_init_from_hw(port->priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(port->priv, &pe, tid); + + mvpp2_prs_tcam_data_byte_get(&pe, 2, &byte[0], &enable[0]); + mvpp2_prs_tcam_data_byte_get(&pe, 3, &byte[1], &enable[1]); +@@ -1970,6 +1991,8 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid) + + memset(&pe, 0, sizeof(pe)); + ++ spin_lock_bh(&priv->prs_spinlock); ++ + /* Scan TCAM and see if entry with this already exist */ + tid = mvpp2_prs_vid_range_find(port, vid, mask); + +@@ -1988,8 +2011,10 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid) + MVPP2_PRS_VLAN_FILT_MAX_ENTRY); + + /* There isn't room for a new VID filter */ +- if (tid < 0) ++ if (tid < 0) { ++ spin_unlock_bh(&priv->prs_spinlock); + return tid; ++ } + + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_VID); + pe.index = tid; +@@ -1997,7 +2022,7 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid) + /* Mask all ports */ + mvpp2_prs_tcam_port_map_set(&pe, 0); + } else { +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } + + /* Enable the current port */ +@@ -2019,6 +2044,7 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid) + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); + mvpp2_prs_hw_write(priv, &pe); + ++ spin_unlock_bh(&priv->prs_spinlock); + return 0; + } + +@@ -2028,15 +2054,16 @@ void mvpp2_prs_vid_entry_remove(struct mvpp2_port *port, u16 vid) + struct mvpp2 *priv = port->priv; + int tid; + +- /* Scan TCAM and see if entry with this already exist */ +- tid = mvpp2_prs_vid_range_find(port, vid, 0xfff); ++ spin_lock_bh(&priv->prs_spinlock); + +- /* No such entry */ +- if (tid < 0) +- return; ++ /* Invalidate TCAM entry with this , if it exists */ ++ tid = mvpp2_prs_vid_range_find(port, vid, 0xfff); ++ if (tid >= 0) { ++ mvpp2_prs_hw_inv(priv, tid); ++ priv->prs_shadow[tid].valid = false; ++ } + +- mvpp2_prs_hw_inv(priv, tid); +- priv->prs_shadow[tid].valid = false; ++ spin_unlock_bh(&priv->prs_spinlock); + } + + /* Remove all existing VID filters on this port */ +@@ -2045,6 +2072,8 @@ void mvpp2_prs_vid_remove_all(struct mvpp2_port *port) + struct mvpp2 *priv = port->priv; + int tid; + ++ spin_lock_bh(&priv->prs_spinlock); ++ + for (tid = MVPP2_PRS_VID_PORT_FIRST(port->id); + tid <= MVPP2_PRS_VID_PORT_LAST(port->id); tid++) { + if (priv->prs_shadow[tid].valid) { +@@ -2052,6 +2081,8 @@ void mvpp2_prs_vid_remove_all(struct mvpp2_port *port) + priv->prs_shadow[tid].valid = false; + } + } ++ ++ spin_unlock_bh(&priv->prs_spinlock); + } + + /* Remove VID filering entry for this port */ +@@ -2060,10 +2091,14 @@ void mvpp2_prs_vid_disable_filtering(struct mvpp2_port *port) + unsigned int tid = MVPP2_PRS_VID_PORT_DFLT(port->id); + struct mvpp2 *priv = port->priv; + ++ spin_lock_bh(&priv->prs_spinlock); ++ + /* Invalidate the guard entry */ + mvpp2_prs_hw_inv(priv, tid); + + priv->prs_shadow[tid].valid = false; ++ ++ spin_unlock_bh(&priv->prs_spinlock); + } + + /* Add guard entry that drops packets when no VID is matched on this port */ +@@ -2079,6 +2114,8 @@ void mvpp2_prs_vid_enable_filtering(struct mvpp2_port *port) + + memset(&pe, 0, sizeof(pe)); + ++ spin_lock_bh(&priv->prs_spinlock); ++ + pe.index = tid; + + reg_val = mvpp2_read(priv, MVPP2_MH_REG(port->id)); +@@ -2111,6 +2148,8 @@ void mvpp2_prs_vid_enable_filtering(struct mvpp2_port *port) + /* Update shadow table */ + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); + mvpp2_prs_hw_write(priv, &pe); ++ ++ spin_unlock_bh(&priv->prs_spinlock); + } + + /* Parser default initialization */ +@@ -2118,6 +2157,20 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv) + { + int err, index, i; + ++ priv->prs_shadow = devm_kcalloc(&pdev->dev, MVPP2_PRS_TCAM_SRAM_SIZE, ++ sizeof(*priv->prs_shadow), ++ GFP_KERNEL); ++ if (!priv->prs_shadow) ++ return -ENOMEM; ++ ++ priv->prs_double_vlans = devm_kcalloc(&pdev->dev, sizeof(bool), ++ MVPP2_PRS_DBL_VLANS_MAX, ++ GFP_KERNEL); ++ if (!priv->prs_double_vlans) ++ return -ENOMEM; ++ ++ spin_lock_bh(&priv->prs_spinlock); ++ + /* Enable tcam table */ + mvpp2_write(priv, MVPP2_PRS_TCAM_CTRL_REG, MVPP2_PRS_TCAM_EN_MASK); + +@@ -2136,12 +2189,6 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv) + for (index = 0; index < MVPP2_PRS_TCAM_SRAM_SIZE; index++) + mvpp2_prs_hw_inv(priv, index); + +- priv->prs_shadow = devm_kcalloc(&pdev->dev, MVPP2_PRS_TCAM_SRAM_SIZE, +- sizeof(*priv->prs_shadow), +- GFP_KERNEL); +- if (!priv->prs_shadow) +- return -ENOMEM; +- + /* Always start from lookup = 0 */ + for (index = 0; index < MVPP2_MAX_PORTS; index++) + mvpp2_prs_hw_port_init(priv, index, MVPP2_PRS_LU_MH, +@@ -2158,26 +2205,13 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv) + mvpp2_prs_vid_init(priv); + + err = mvpp2_prs_etype_init(priv); +- if (err) +- return err; +- +- err = mvpp2_prs_vlan_init(pdev, priv); +- if (err) +- return err; +- +- err = mvpp2_prs_pppoe_init(priv); +- if (err) +- return err; +- +- err = mvpp2_prs_ip6_init(priv); +- if (err) +- return err; +- +- err = mvpp2_prs_ip4_init(priv); +- if (err) +- return err; ++ err = err ? : mvpp2_prs_vlan_init(pdev, priv); ++ err = err ? : mvpp2_prs_pppoe_init(priv); ++ err = err ? : mvpp2_prs_ip6_init(priv); ++ err = err ? : mvpp2_prs_ip4_init(priv); + +- return 0; ++ spin_unlock_bh(&priv->prs_spinlock); ++ return err; + } + + /* Compare MAC DA with tcam entry data */ +@@ -2217,7 +2251,7 @@ mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da, + (priv->prs_shadow[tid].udf != udf_type)) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + entry_pmap = mvpp2_prs_tcam_port_map_get(&pe); + + if (mvpp2_prs_mac_range_equals(&pe, da, mask) && +@@ -2229,7 +2263,8 @@ mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da, + } + + /* Update parser's mac da entry */ +-int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add) ++static int mvpp2_prs_mac_da_accept_unlocked(struct mvpp2_port *port, ++ const u8 *da, bool add) + { + unsigned char mask[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; + struct mvpp2 *priv = port->priv; +@@ -2261,7 +2296,7 @@ int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add) + /* Mask all ports */ + mvpp2_prs_tcam_port_map_set(&pe, 0); + } else { +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + } + + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_MAC); +@@ -2317,6 +2352,17 @@ int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add) + return 0; + } + ++int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add) ++{ ++ int err; ++ ++ spin_lock_bh(&port->priv->prs_spinlock); ++ err = mvpp2_prs_mac_da_accept_unlocked(port, da, add); ++ spin_unlock_bh(&port->priv->prs_spinlock); ++ ++ return err; ++} ++ + int mvpp2_prs_update_mac_da(struct net_device *dev, const u8 *da) + { + struct mvpp2_port *port = netdev_priv(dev); +@@ -2345,6 +2391,8 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port) + unsigned long pmap; + int index, tid; + ++ spin_lock_bh(&priv->prs_spinlock); ++ + for (tid = MVPP2_PE_MAC_RANGE_START; + tid <= MVPP2_PE_MAC_RANGE_END; tid++) { + unsigned char da[ETH_ALEN], da_mask[ETH_ALEN]; +@@ -2354,7 +2402,7 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port) + (priv->prs_shadow[tid].udf != MVPP2_PRS_UDF_MAC_DEF)) + continue; + +- mvpp2_prs_init_from_hw(priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(priv, &pe, tid); + + pmap = mvpp2_prs_tcam_port_map_get(&pe); + +@@ -2375,14 +2423,17 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port) + continue; + + /* Remove entry from TCAM */ +- mvpp2_prs_mac_da_accept(port, da, false); ++ mvpp2_prs_mac_da_accept_unlocked(port, da, false); + } ++ ++ spin_unlock_bh(&priv->prs_spinlock); + } + + int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type) + { + switch (type) { + case MVPP2_TAG_TYPE_EDSA: ++ spin_lock_bh(&priv->prs_spinlock); + /* Add port to EDSA entries */ + mvpp2_prs_dsa_tag_set(priv, port, true, + MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA); +@@ -2393,9 +2444,11 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type) + MVPP2_PRS_TAGGED, MVPP2_PRS_DSA); + mvpp2_prs_dsa_tag_set(priv, port, false, + MVPP2_PRS_UNTAGGED, MVPP2_PRS_DSA); ++ spin_unlock_bh(&priv->prs_spinlock); + break; + + case MVPP2_TAG_TYPE_DSA: ++ spin_lock_bh(&priv->prs_spinlock); + /* Add port to DSA entries */ + mvpp2_prs_dsa_tag_set(priv, port, true, + MVPP2_PRS_TAGGED, MVPP2_PRS_DSA); +@@ -2406,10 +2459,12 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type) + MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA); + mvpp2_prs_dsa_tag_set(priv, port, false, + MVPP2_PRS_UNTAGGED, MVPP2_PRS_EDSA); ++ spin_unlock_bh(&priv->prs_spinlock); + break; + + case MVPP2_TAG_TYPE_MH: + case MVPP2_TAG_TYPE_NONE: ++ spin_lock_bh(&priv->prs_spinlock); + /* Remove port form EDSA and DSA entries */ + mvpp2_prs_dsa_tag_set(priv, port, false, + MVPP2_PRS_TAGGED, MVPP2_PRS_DSA); +@@ -2419,6 +2474,7 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type) + MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA); + mvpp2_prs_dsa_tag_set(priv, port, false, + MVPP2_PRS_UNTAGGED, MVPP2_PRS_EDSA); ++ spin_unlock_bh(&priv->prs_spinlock); + break; + + default: +@@ -2437,11 +2493,15 @@ int mvpp2_prs_add_flow(struct mvpp2 *priv, int flow, u32 ri, u32 ri_mask) + + memset(&pe, 0, sizeof(pe)); + ++ spin_lock_bh(&priv->prs_spinlock); ++ + tid = mvpp2_prs_tcam_first_free(priv, + MVPP2_PE_LAST_FREE_TID, + MVPP2_PE_FIRST_FREE_TID); +- if (tid < 0) ++ if (tid < 0) { ++ spin_unlock_bh(&priv->prs_spinlock); + return tid; ++ } + + pe.index = tid; + +@@ -2461,6 +2521,7 @@ int mvpp2_prs_add_flow(struct mvpp2 *priv, int flow, u32 ri, u32 ri_mask) + mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); + mvpp2_prs_hw_write(priv, &pe); + ++ spin_unlock_bh(&priv->prs_spinlock); + return 0; + } + +@@ -2472,6 +2533,8 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port) + + memset(&pe, 0, sizeof(pe)); + ++ spin_lock_bh(&port->priv->prs_spinlock); ++ + tid = mvpp2_prs_flow_find(port->priv, port->id); + + /* Such entry not exist */ +@@ -2480,8 +2543,10 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port) + tid = mvpp2_prs_tcam_first_free(port->priv, + MVPP2_PE_LAST_FREE_TID, + MVPP2_PE_FIRST_FREE_TID); +- if (tid < 0) ++ if (tid < 0) { ++ spin_unlock_bh(&port->priv->prs_spinlock); + return tid; ++ } + + pe.index = tid; + +@@ -2492,13 +2557,14 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port) + /* Update shadow table */ + mvpp2_prs_shadow_set(port->priv, pe.index, MVPP2_PRS_LU_FLOWS); + } else { +- mvpp2_prs_init_from_hw(port->priv, &pe, tid); ++ mvpp2_prs_init_from_hw_unlocked(port->priv, &pe, tid); + } + + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_FLOWS); + mvpp2_prs_tcam_port_map_set(&pe, (1 << port->id)); + mvpp2_prs_hw_write(port->priv, &pe); + ++ spin_unlock_bh(&port->priv->prs_spinlock); + return 0; + } + +@@ -2509,11 +2575,14 @@ int mvpp2_prs_hits(struct mvpp2 *priv, int index) + if (index > MVPP2_PRS_TCAM_SRAM_SIZE) + return -EINVAL; + ++ spin_lock_bh(&priv->prs_spinlock); ++ + mvpp2_write(priv, MVPP2_PRS_TCAM_HIT_IDX_REG, index); + + val = mvpp2_read(priv, MVPP2_PRS_TCAM_HIT_CNT_REG); + + val &= MVPP2_PRS_TCAM_HIT_CNT_MASK; + ++ spin_unlock_bh(&priv->prs_spinlock); + return val; + } +-- +2.43.0 +